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參數(shù)資料
| 型號(hào)： | Am79C965A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet?-32 Single-Chip 32-Bit Ethernet Controller |
| 中文描述： | PCnet？-32單芯片32位以太網(wǎng)控制器 |
| 文件頁(yè)數(shù)： | 121/228頁(yè) |
| 文件大?。?/td> | 1681K |
| 代理商： | AM79C965A |
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Am79C965A
121
data can be looped back to the receiver at one of two
places inside the controller without actually transmitting
any data to the external network. The receiver will
move the received data to the external network. The
receiver will move the received data to the next receive
buffer, where it can be examined by software.
Alternatively, in external loopback mode, data can be
transmitted to and received from the external network.
There are restrictions on loopback operation. The
PCnet-32 controller has only one FCS generator
circuit. The FCS generator can be used by the
transmitter to generate the FCS that is appended to the
frame, or it can be used by the receiver to verify the
FCS of the received frame. It can not be used by the
receiver and transmitter at the same time.
If the FCS generator is connected to the receiver, the
transmitter will not append an FCS to the frame, but the
receiver will check for one. The user can, however,
calculate the FCS value for a frame and include this
four-byte number in the transmit buffer.
If the FCS generator is connected to the transmitter, the
transmitter will append an FCS to the frame, but the re-
ceiver will not check it. However, the user can verify the
FCS by software.
During loopback the FCS logic can be allocated to the
receiver by setting DXMTFCS = 1 in CSR15.
If DXMTFCS=0, the MAC Engine will calculate and ap-
pend the FCS to the transmitted message. The receive
message passed to the host will therefore contain an
additional 4 bytes of FCS. In this loopback
configuration, the receive circuitry cannot detect FCS
errors if they occur.
If DXMTFCS=1, the last four bytes of the transmit
message must contain the (software generated) FCS
computed for the transmit data preceding it. The MAC
Engine will transmit the data without addition of an FCS
field, and the FCS will be calculated and verified at the
receiver.
The loopback facilities of the MAC Engine allow full
operation to be verified without disturbance to the
network. Loopback operation is also affected by the
state of the Loopback Control bits (LOOP, MENDECL,
and INTL) in CSR15. This affects whether the internal
MENDEC is considered part of the internal or external
loop-back path.
The multicase address detection logic uses the FCS
generator. Therefore, when in the loopback mode(s),
the multicast address detection feature of the MAC
Engine, programmed by the contents of the Logical
Address Filter (LADRF [63:0] in CSRs 8-11) can only
be tested when DXMTFCS=1, allocating the FCS
generator to the receiver. All other features operate
identically in loopback as in normal operation, such as
automatic transmit padding and receive pad stripping.
When performing an internal loopback, no frame will be
transmitted to the network. However, when the
PCnet-32 controller is configured for internal loopback
the receiver will not be able to detect network traffic.
External loopback tests will transmit frames onto the
network when the AUI port is selected. Runt Packet
Accept is automatically enabled when any loopback
mode is invoked.
Loopback mode can be performed with any frame size.
Runt Packet Accept is internally enabled (RPA bit in
CSR 124 is not affected) when any loopback mode is
invoked. This is to be backwards compatible to the
LANCE (Am7990) software.
When external loopback is performed while the
10BASE-T MAU is selected, collision detection is
disabled. This is necessary, because a collision in a
10BASE-T system is defined as activity on the
transmitter outputs and receiver inputs at the same
time, which is exactly what happens during external
loopback.
Since a 10BASE-T hub does not normally feed the
station
’
s transmitter outputs back into the station
’
s
receiver inputs, the use of external loopback in a
10BASE-T system usually requires some sort of
external hardware that connects the outputs of the
10BASE-T MAU to its inputs.
LED Support
The PCnet-32 controller can support up to 4 LEDs.
LED outputs LNKST, LED1 and LED2 allow for direct
connection of an LED and its supporting pull-up device.
LED output LEDPRE3 may require an additional buffer
between the PCnet-32 controller output pin and the
LED and its supporting pull-up device.
Because the LEDPRE3 output is multiplexed with other
PCnet-32 controller functions, it may not always be
possible to connect an LED circuit directly to the
LEDPRE3 pin. For example, when an LED circuit is
directly connected to the EEDO/LEDPRE3/SRD pin,
then it is not possible for most serial EEPROM devices
to sink enough I
OL
to maintain a valid low level on the
EEDO input to the PCnet-32 controller. Therefore, in
applications that require both an EEPROM and a fourth
LED, then it is necessary to buffer the LEDPRE3 circuit
from the EEPROM-PCnet-32 controller connection.
The LED registers in the BCR resource space allow
each LED output to be programmed for either active
high or active low operation, so that both inverting and
non-inverting buffering choices are possible.
In applications where an EEPROM is not needed, the
LEDPRE3 pin may be directly connected to an LED
circuit. The PCnet-32 controller LEDPRE3 pin driver
will be able to sink enough current to properly drive the
LED circuit.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C965AWW WAF | 制造商:Advanced Micro Devices 功能描述: |
| AM79C970 | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| AM79C970A | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC | 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
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