參數(shù)資料
型號: Am79C965A
廠商: Advanced Micro Devices, Inc.
英文描述: PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述: PCnet?-32單芯片32位以太網(wǎng)控制器
文件頁數(shù): 97/228頁
文件大小: 1681K
代理商: AM79C965A
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁當(dāng)前第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁
Am79C965A
97
will be set in the Transmit Descriptor Ring (TMD2,
bit27) after the frame has been transmitted.
Differential Input Terminations
The differential input for the Manchester data (DI±) is
externally terminated by two 40.2 W ±1% resistors and
one optional common-mode bypass capacitor, as
shown in the Differential Input Termination diagram be-
low. The differential input impedance, ZIDF, and the
common-mode input impedance, ZICM, are specified
so that the Ethernet specification for cable termination
impedance is met using standard 1% resistor
terminators. If SIP devices are used, 39 W is also a
suitable value. The CI± differential inputs are
terminated in exactly the same way as the DI± pair.
Figure 31. AUI Differential Input Termination
Collision Detection
A MAU detects the collision condition on the network
and generates a differential signal at the CI± inputs.
This collision signal passes through an input stage
which detects signal levels and pulse duration. When
the signal is detected by the MENDEC it sets the
ICLSN line HIGH. The condition continues for
approximately 1.5 bit times after the last LOW-to-HIGH
transition on CI±.
Twisted-Pair Transceiver (T-MAU)
The T-MAU implements the Medium Attachment Unit
(MAU) functions for the Twisted Pair Medium, as speci-
fied by the supplement to ISO 8802-3 (IEEE/ANSI
802.3) standard (Type 10BASE-T). The T-MAU pro-
vides twisted pair driver and receiver circuits, including
on-board transmit digital predistortion and receiver
squelch and a number of additional features including
Link Status indication, Automatic Twisted Pair Receive
Polarity Detection/Correction and Indication, Receive
Carrier Sense, Transmit Active and Collision Present
indication.
T-MAU gets reset during power-up by H_RESET, by
S_RESET when reset port is read, or by asserting the
RESET pin. T-MAU is not reset by STOP.
Twisted Pair Transmit Function
The differential driver circuitry in the TXD± and TXP±
pins provides the necessary electrical driving capability
and the pre-distortion control for transmitting signals
over maximum length Twisted Pair cable, as specified
by the 10BASE-T supplement to the ISO 8802-3 (IEEE/
ANSI 802.3) Standard. The transmit function for data
output meets the propagation delays and jitter
specified by the standard.
Twisted Pair Receive Function
The receiver complies with the receiver specifications
of the ISO 8802-3 (IEEE/ANSI 802.3) 10BASE-T Stan-
dard, including noise immunity and received signal re-
jection criteria (
Smart Squelch
). Signals meeting this
criteria appearing at the RXD± differential input pair are
routed to the MENDEC. The receiver function meets
the propagation delays and jitter requirements
specified by the standard. The receiver squelch level
drops to half its threshold value after unsquelch to allow
reception of minimum amplitude signals and to offset
carrier fade in the event of worst case signal
attenuation and crosstalk noise conditions.
Note that the 10BASE-T Standard defines the receive
input amplitude at the external Media Dependent Inter-
face (MDI). Filter and transformer loss are not
specified. The T-MAU receiver squelch levels are
defined to account for a 1 dB insertion loss at 10 MHz,
which is typical for the type of receive filters/
transformers employed.
Normal 10BASE-T compatible receive thresholds are
employed when the LRT (CSR15[9]) bit is LOW. When
the LRT bit is set (HIGH), the Low Receive Threshold
option is invoked, and the sensitivity of the T-MAU re-
ceiver is increased. This allows longer line lengths to
be employed, exceeding the 100 m target distance of
normal 10BASE-T (assuming typical 24 AWG cable).
The increased receiver sensitivity compensates for the
increased signal attenuation caused by the additional
cable distance.
However, making the receiver more sensitive means
that it is also more susceptible to extraneous noise, pri-
marily caused by coupling from co-resident services
(crosstalk). For this reason, it is recommended that
when using the Low Receive Threshold option that the
service should be installed on 4-pair cable only. Multi-
pair cables within the same outer sheath have lower
crosstalk attenuation, and may allow noise emitted
from adjacent pairs to couple into the receive pair, and
be of sufficient amplitude to falsely unsquelch the
T-MAU.
DI+
DI-
40.2
40.2
0.01
μ
F
to 0.1
μ
F
AUI Isolation
Transformer
PCnet 32
18219-38
相關(guān)PDF資料
PDF描述
AM79C970AKCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AVCW PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970 PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C965AWW WAF 制造商:Advanced Micro Devices 功能描述:
AM79C970 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product