參數(shù)資料
型號: Am79C965A
廠商: Advanced Micro Devices, Inc.
英文描述: PCnet?-32 Single-Chip 32-Bit Ethernet Controller
中文描述: PCnet?-32單芯片32位以太網(wǎng)控制器
文件頁數(shù): 220/228頁
文件大?。?/td> 1681K
代理商: AM79C965A
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D-6
Am79C965A
must
treat the location as a don
t care; The rule is, after finding ENP=1 (or ERR=1) in descriptor number 2, the software
must ignore ENP bits until it finds the next STP=1.
3. Assume that instead of the expected 1060 byte
frame, a 100 byte frame arrives, because there was
an error in the network, or because this is the last
frame in a file transmission sequence, or perhaps
because it is an acknowledge frame.
* ENP or ERR
** Same as note in case 2 above, except that in this case, it is very unlikely that the driver can respond to the in-
terrupt and get the pointer from the application before the PCnet-32 controller has completed its poll of the next
descriptors. This means that for almost all occurrences of this case, the PCnet-32 controller will not find the
OWN bit set for this descriptor and therefore, the ENP bit will almost always contain the old value, since the
PCnet-32 controller will not have had an opportunity to modify it.
*** Note that even though the PCnet-32 controller will write a ZERO to this ENP location, the software should treat
the location as a don
t care, since after finding the ENP=1 in descriptor number 2, the software should ignore
ENP bits until it finds the next STP=1.
Buffer Size Tuning
For maximum performance, buffer sizes should be ad-
justed depending upon the expected frame size and
the values of the interrupt latency and application call
latency. The best driver code will minimize the CPU uti-
lization while also minimizing the latency from frame
end on the network to frame sent to application from
driver (frame latency). These objectives are aimed at
increasing throughput on the network while decreasing
CPU utilization.
Note that the buffer sizes in the ring may be altered at
any time that the CPU has ownership of the corre-
sponding descriptor. The best choice for buffer sizes
will maximize the time that the driver is swapped out,
while minimizing the time from the last byte written by
the PCnet-32 controller to the time that the data is
passed from the driver to the application. In the dia-
gram, this corresponds to maximizing S0, while mini-
mizing the time between C9 and S8. (The timeline
happens to show a minimal time from C9 to S8.)
Note that by increasing the size of buffer number 1, we
increase the value of S0. However, when we increase
the size of buffer number 1, we also increase the value
of S4. If the size of buffer number 1 is too large, then
the driver will not have enough time to perform tasks
S2, S3, S4, S5 and S6. The result is that there will be
delay from the execution of task C9 until the execution
of task S8. A perfectly timed system will have the val-
ues for S5 and S7 at a minimum.
An average increase in performance can be achieved if
the general guidelines of buffer sizes in figure 2 is fol-
lowed. However, as was noted earlier, the correct sizing
for buffers will depend upon the expected message
size. There are two problems with relating expected
message size with the correct buffer sizing:
1. Message sizes cannot always be accurately pre-
dicted, since a single application may expect differ-
ent message sizes at different times, therefore, the
buffer sizes chosen will not always maximize
throughput.
2. Within a single application, message sizes might be
somewhat predictable, but when the same driver is
to be shared with multiple applications, there may
not be a common predictable message size.
Additional problems occur when trying to define the
correct sizing because the correct size also depends
Descriptor
Number
Before the
Frame Arrived
After the
Frame has Arrived
Comments
(After Frame Arrival)
OWN
STP
ENP*
OWN
STP
ENP*
1
1
1
X
0
1
1
Bytes 1
100
2
1
0
X
0
0
0***
Discarded buffer
3
0
0
X
0
0
**
Discarded buffer
4
1
1
X
1
1
X
Controller
s current
location
5
1
0
X
1
0
X
Not yet used
6
0
0
X
0
0
X
Not yet used
etc.
1
1
X
1
1
X
Not yet used
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