III PERIPHERAL MODULES 1 (SYSTEM): REAL-TIME CLOCK (RTC)
III-3-10
EPSON
S1C33E07 TECHNICAL MANUAL
III.3.4 RTC Interrupts
The RTC has a function to generate interrupts at given intervals.
Since the RTC is active even in standby mode, interrupts may be used to turn off SLEEP mode.
This section describes the internal interrupt control function of the RTC. To generate interrupts to the CPU, the
ITC must also be set up. For details on how to control the ITC, see Section III.2, “Interrupt Controller (ITC).” For
details on how to turn off SLEEP mode using an interrupt, see Section III.1, “Clock Management Unit (CMU).”
Setting the interrupt cycle
The interrupt cycle (in which the RTC outputs interrupt requests at specific intervals) can be selected from four
choices listed in Table III.3.4.1 by using RTCT[1:0] (D[3:2]/0x301904).
RTCT[1:0]: RTC Interrupt Cycle Setup Bits in the RTC Interrupt Mode Register (D[3:2]/0x301904)
Table III.3.4.1 Interrupt Cycle Settings
RTCT1
1
0
RTCT0
1
0
1
0
Interrupt cycle
1 hour
1 minute
1 second
1/64 second
RTCT[1:0] (D[3:2]/0x301904) should be set while RTC interrupts are disabled. (See the procedure for enabling
and disabling interrupts described below.)
Setting interrupt conditions
The interrupt requests sent to the ITC can be selected as edge-triggered or level-sensed interrupts by setting a
register bit. RTCIMD (D1/0x301904) is the bit provided for this purpose.
RTCIMD: RTC Interrupt Mode Select Bit in the RTC Interrupt Mode Register (D1/0x301904)
Setting RTCIMD (D1/0x301904) to 1 selects a level-sensed interrupt; setting it to 0 selects an edge-triggered
interrupt.
When an edge-triggered interrupt has been selected, the RTC outputs an interrupt pulse to the ITC using the bus
clock supplied from the CMU. If a cause of interrupt occurs when the bus clock has not been supplied such as
in SLEEP mode, the RTC switches the interrupt mode to level-sensed and sets the interrupt signal to the active
level from occurrence of the interrupt cause until the bus clock supply is started.
Enabling and disabling interrupts
The RTC interrupt requests output to the ITC are enabled by setting RTCIEN (D0/0x301904) to 1 and disabled
by setting it to 0.
RTCIEN: RTC Interrupt Enable Bit in the RTC Interrupt Mode Register (D0/0x301904)
Interrupt status
When the RTC is up and running, RTCIRQ (D0/0x301900) is set at the cyclic interrupt intervals set up by
RTCT[1:0]. When RTC interrupts are enabled by RTCIEN (D0/0x301904), interrupt requests are sent to the
ITC.
RTCIRQ: Interrupt Status Bit in the RTC Interrupt Status Register (D0/0x301900)
Writing 1 to this status bit clears the bit. Because this bit is not cleared in hardware, be sure to clear it in
software after an interrupt is generated. If this bit remains set while interrupts are re-enabled or control is
returned from the interrupt handler routine by the reti instruction, the same interrupt may be generated again.
Precautions
All RTC interrupt control bits described above are indeterminate when power is turned on. Moreover, these bits
are not initialized to specific values by an initial reset.
After power-on, be sure to set RTCIEN (D0/0x301904) to 0 (interrupt disabled) to prevent the occurrence of
unwanted RTC interrupts. Also be sure to write 1 to RTCIRQ (D0/0x301900) to reset it.