
V PERIPHERAL MODULES 3 (INTERFACE): GENERAL-PURPOSE SERIAL INTERFACE (EFSIO)
V-1-40
EPSON
S1C33E07 TECHNICAL MANUAL
V.1.8 Details of Control Registers
Table V.1.8.1 List of Serial Interface Registers
Address
0x00300B00
0x00300B01
0x00300B02
0x00300B03
0x00300B04
0x00300B05
0x00300B06
0x00300B07
0x00300B08
0x00300B09
0x00300B10
0x00300B11
0x00300B12
0x00300B13
0x00300B14
0x00300B15
0x00300B16
0x00300B17
0x00300B18
0x00300B19
0x00300B1A
0x00300B1B
0x00300B1C
0x00300B1D
0x00300B1E
0x00300B1F
0x00300B20
0x00300B21
0x00300B22
0x00300B23
0x00300B24
0x00300B25
0x00300B26
0x00300B27
0x00300B28
0x00300B29
0x00300B4F
Function
Ch.0 transmit data
Ch.0 receive data
Ch.0 transfer/error status
Sets Ch.0 transfer mode and controls transfer.
Sets Ch.0 asynchronous/IrDA mode.
Controls Ch.0 baud-rate timer.
Ch.0 baud-rate timer reload data low-order 8 bits
Ch.0 baud-rate timer reload data high-order 4 bits
Ch.0 baud-rate timer count data low-order 8 bits
Ch.0 baud-rate timer count data high-order 4 bits
Ch.1 transmit data
Ch.1 receive data
Ch.1 transfer/error status
Sets Ch.1 transfer mode and controls transfer.
Sets Ch.1 asynchronous/IrDA mode.
Controls Ch.1 baud-rate timer.
Ch.1 baud-rate timer reload data low-order 8 bits
Ch.1 baud-rate timer reload data high-order 4 bits
Ch.1 baud-rate timer count data low-order 8 bits
Ch.1 baud-rate timer count data high-order 4 bits
Sets Ch.1 ISO7816 mode and controls clock
output.
Ch.1 ISO7816 error status
Ch.1 ISO7816 FI/DI ratio low-order 8 bits
Ch.1 ISO7816 FI/DI ratio high-order 6 bits
Sets Ch.1 transmit time guard function.
Sets number of output clocks for Ch.1 ISO7816
mode.
Ch.2 transmit data
Ch.2 receive data
Ch.2 transfer/error status
Sets Ch.2 transfer mode and controls transfer.
Sets Ch.2 asynchronous/IrDA mode.
Controls Ch.2 baud-rate timer.
Ch.2 baud-rate timer reload data low-order 8 bits
Ch.2 baud-rate timer reload data high-order 4 bits
Ch.2 baud-rate timer count data low-order 8 bits
Ch.2 baud-rate timer count data high-order 4 bits
Selects standard or advanced mode.
Register name
Serial I/F Ch.0 Transmit Data Register (pEFSIF0_TXD)
Serial I/F Ch.0 Receive Data Register (pEFSIF0_RXD)
Serial I/F Ch.0 Status Register (pEFSIF0_STATUS)
Serial I/F Ch.0 Control Register (pEFSIF0_CTL)
Serial I/F Ch.0 IrDA Register (pEFSIF0_IRDA)
Serial I/F Ch.0 Baud-rate Timer Control Register
(pEFSIF0_BRTRUN)
Serial I/F Ch.0 Baud-rate Timer Reload Data Register (LSB)
(pEFSIF0_BRTRDL)
Serial I/F Ch.0 Baud-rate Timer Reload Data Register (MSB)
(pEFSIF0_BRTRDM)
Serial I/F Ch.0 Baud-rate Timer Count Data Register (LSB)
(pEFSIF0_BRTCDL)
Serial I/F Ch.0 Baud-rate Timer Count Data Register (MSB)
(pEFSIF0_BRTCDM)
Serial I/F Ch.1 Transmit Data Register (pEFSIF1_TXD)
Serial I/F Ch.1 Receive Data Register (pEFSIF1_RXD)
Serial I/F Ch.1 Status Register (pEFSIF1_STATUS)
Serial I/F Ch.1 Control Register (pEFSIF1_CTL)
Serial I/F Ch.1 IrDA Register (pEFSIF1_IRDA)
Serial I/F Ch.1 Baud-rate Timer Control Register
(pEFSIF1_BRTRUN)
Serial I/F Ch.1 Baud-rate Timer Reload Data Register (LSB)
(pEFSIF1_BRTRDL)
Serial I/F Ch.1 Baud-rate Timer Reload Data Register (MSB)
(pEFSIF1_BRTRDM)
Serial I/F Ch.1 Baud-rate Timer Count Data Register (LSB)
(pEFSIF1_BRTCDL)
Serial I/F Ch.1 Baud-rate Timer Count Data Register (MSB)
(pEFSIF1_BRTCDM)
Serial I/F Ch.1 ISO7816 Mode Control Register
(pEFSIF1_7816CTL)
Serial I/F Ch.1 ISO7816 Mode Status Register
(pEFSIF1_7816STA)
Serial I/F Ch.1 ISO7816 Mode FI/DI Ratio Register (LSB)
(pEFSIF1_FIDIL)
Serial I/F Ch.1 ISO7816 Mode FI/DI Ratio Register (MSB)
(pEFSIF1_FIDIM)
Serial I/F Ch.1 Transmit Time Guard Register
(pEFSIF1_TTGR)
Serial I/F Ch.1 ISO7816 Mode Output Clock Setup Register
(pEFSIF1_CLKNUM)
Serial I/F Ch.2 Transmit Data Register (pEFSIF2_TXD)
Serial I/F Ch.2 Receive Data Register (pEFSIF2_RXD)
Serial I/F Ch.2 Status Register (pEFSIF2_STATUS)
Serial I/F Ch.2 Control Register (pEFSIF2_CTL)
Serial I/F Ch.2 IrDA Register (pEFSIF2_IRDA)
Serial I/F Ch.2 Baud-rate Timer Control Register
(pEFSIF2_BRTRUN)
Serial I/F Ch.2 Baud-rate Timer Reload Data Register (LSB)
(pEFSIF2_BRTRDL)
Serial I/F Ch.2 Baud-rate Timer Reload Data Register (MSB)
(pEFSIF2_BRTRDM)
Serial I/F Ch.2 Baud-rate Timer Count Data Register (LSB)
(pEFSIF2_BRTCDL)
Serial I/F Ch.2 Baud-rate Timer Count Data Register (MSB)
(pEFSIF2_BRTCDM)
Serial I/F STD/ADV Mode Select Register (pEFSIF_ADV)
Size
8
The following describes each serial interface control register.
The serial interface control registers are mapped in the 8-bit device area from 0x300B00 to 0x300B4F, and can be
accessed in units of bytes.
Note: When setting the serial interface control registers, be sure to write a 0, and not a 1, for all “reserved
bits.”