APPENDIX A I/O MAP
S1C33E07 TECHNICAL MANUAL
EPSON
AP-A-5
AP
I/Omap
0x300273–0x300283
Interrupt Controller
Name
Address
Register name
Bit
Function
Setting
Init. R/W
Remarks
E16TC3
E16TU3
–
E16TC2
E16TU2
–
D7
D6
D5–4
D3
D2
D1–0
16-bit timer 3 comparison A
16-bit timer 3 comparison B
reserved
16-bit timer 2 comparison A
16-bit timer 2 comparison B
reserved
0
–
0
–
R/W
–
R/W
–
0 when being read.
00300273
(B)
1 Enabled
0 Disabled
16-bit timer 2–3
interrupt
enable register
(pINT_E16T23)
–
1 Enabled
0 Disabled
–
E16TC5
E16TU5
–
E16TC4
E16TU4
–
D7
D6
D5–4
D3
D2
D1–0
16-bit timer 5 comparison A
16-bit timer 5 comparison B
reserved
16-bit timer 4 comparison A
16-bit timer 4 comparison B
reserved
0
–
0
–
R/W
–
R/W
–
0 when being read.
00300274
(B)
1 Enabled
0 Disabled
16-bit timer 4–5
interrupt
enable register
(pINT_E16T45)
–
1 Enabled
0 Disabled
–
–
ESTX1
ESRX1
ESERR1
ESTX0
ESRX0
ESERR0
D7–6
D5
D4
D3
D2
D1
D0
reserved
SIF Ch.1 transmit buffer empty
SIF Ch.1 receive buffer full
SIF Ch.1 receive error
SIF Ch.0 transmit buffer empty
SIF Ch.0 receive buffer full
SIF Ch.0 receive error
–
0
–
R/W
0 when being read.
00300276
(B)
1 Enabled
0 Disabled
Serial I/F
Ch.0–1
interrupt
enable register
(pINT_ESIF01)
–
EP7
EP6
EP5
EP4
ERTC
EADE
EADC
D7
D6
D5
D4
D3
D2
D1
D0
reserved
Port input 7
Port input 6
Port input 5
Port input 4
RTC
A/D conversion completion
A/D out-of-range
–
0
–
R/W
0 when being read.
00300277
(B)
1 Enabled
0 Disabled
Port input 4–7,
RTC, A/D
interrupt
enable register
(pINT_EP47_ERTC
_EAD)
–
ELCDC
–
D7–2
D1
D0
reserved
LCDC frame end
reserved
–
0
–
R/W
–
0 when being read.
Do not write 1.
00300278
(B)
LCDC interrupt
enable register
(pINT_ELCDC)
–
1 Enabled
0 Disabled
–
ESPITX
ESPIRX
–
ESTX2
ESRX2
ESERR2
D7–6
D5
D4
D3
D2
D1
D0
reserved
SPI transmit DMA
SPI receive DMA
reserved
SIF Ch.2 transmit buffer empty
SIF Ch.2 receive buffer full
SIF Ch.2 receive error
–
0
–
0
–
R/W
–
R/W
0 when being read.
Do not write 1.
00300279
(B)
1 Enabled
0 Disabled
1 Enabled
0 Disabled
Serial I/F Ch.2,
SPI interrupt
enable register
(pINT_ESIF2_ESPI)
–
–
FK1
FK0
FP3
FP2
FP1
FP0
D7–6
D5
D4
D3
D2
D1
D0
reserved
Key input 1
Key input 0
Port input 3
Port input 2
Port input 1
Port input 0
–
X
–
R/W
0 when being read.
00300280
(B)
1 Occurred
0 Not occurred
Key input,
port input 0–3
interrupt cause
flag register
(pINT_FK01_FP03)
–
FIDMA
FHDM3
FHDM2
FHDM1
FHDM0
D7–5
D4
D3
D2
D1
D0
reserved
IDMA
HSDMA Ch.3
HSDMA Ch.2
HSDMA Ch.1
HSDMA Ch.0
–
X
–
R/W
0 when being read.
00300281
(B)
DMA interrupt
cause flag
register
(pINT_FDMA)
1 Occurred
0 Not occurred
F16TC1
F16TU1
–
F16TC0
F16TU0
–
D7
D6
D5–4
D3
D2
D1–0
16-bit timer 1 comparison A
16-bit timer 1 comparison B
reserved
16-bit timer 0 comparison A
16-bit timer 0 comparison B
reserved
X
–
X
–
R/W
–
R/W
–
0 when being read.
00300282
(B)
1 Occurred
0 Not occurred
16-bit timer 0–1
interrupt cause
flag register
(pINT_F16T01)
–
1 Occurred
0 Not occurred
–
F16TC3
F16TU3
–
F16TC2
F16TU2
–
D7
D6
D5–4
D3
D2
D1–0
16-bit timer 3 comparison A
16-bit timer 3 comparison B
reserved
16-bit timer 2 comparison A
16-bit timer 2 comparison B
reserved
X
–
X
–
R/W
–
R/W
–
0 when being read.
00300283
(B)
1 Occurred
0 Not occurred
16-bit timer 2–3
interrupt cause
flag register
(pINT_F16T23)
–
1 Occurred
0 Not occurred
–