
III PERIPHERAL MODULES 1 (SYSTEM): REAL-TIME CLOCK (RTC)
III-3-18
EPSON
S1C33E07 TECHNICAL MANUAL
0x30190C: RTC Access Control Register (pRTC_CNTL1)
Name
Address
Register name
Bit
Function
Setting
Init. R/W
Remarks
–
RTCBSY
RTCHLD
D31–2
D1
D0
reserved
Counter busy flag
Counter hold control
–
X
–
R
R/W
0 when being read.
0030190C
(W)
RTC access
control register
(pRTC_CNTL1)
–
1 Busy
0 R/W possible
1 Hold
0 Running
D[31:2]
Reserved
D1
RTCBSY: Counter Busy Flag
This flag indicates whether 1 is being carried over to the next-digit counter.
1 (R):
Busy (while 1 is being carried over)
0 (R):
Accessible for read/write
1/0 (W): Has no effect
If 1 is being carried over while the counters are being read, correct counter values may not be read.
Moreover, attempting a write or stop operation may corrupt the counter values. Therefore, this bit
should be checked to confirm that the counters are not in a carry (busy) state before reading or writing
data from or to the count registers.
However, because this bit is fixed to 1 while the counters are operating, RTCHLD (D0) should be set to
1 so that the count value reflects the current state.
When a value of 0 is read from this bit after writing 1 to RTCHLD (D0), it means that 1 is not now
being carried over. In this case, the counter hold function is also actuated, with a carry over of 1 to the
1-second counter disabled in hardware. Counters for less than seconds continue operating. In this state,
data can be read from or written to the count registers. After reading or writing data, reset RTCHLD (D0)
to 0.
If 1 is being carried over when data is being read from or written to counters in the hold state, 1 second
is automatically added at that time, with RTCHLD (D0) reset to 0 for correcting the count value. This
correction is only effective for 1 second, thus ignoring the time needed to carry over 1 on subsequent
occasions. In this case, the timekeeping data gets out of order. Therefore, be sure to reset RTCHLD (D0)
to 0 as soon as possible after completing the required read or write operation.
When a value of 1 is read from this bit after writing 1 to RTCHLD (D0), it means that 1 is now being
carried over. A period of 4 ms per second is required for a carry over of 1 to the counters. In this
case, reset RTCHLD (D0) to 0 as soon as possible and check this bit again by following the same
procedure, or wait 4 ms before checking this bit. If this bit is set to 1, always reset RTCHLD (D0) to 0
immediately. Leaving RTCHLD (D0) set to 1 may result in an incorrect time of day.
D0
RTCHLD: Counter Hold Control Bit
This bit allows the busy state of counters to be checked and the counters held intact.
1 (R/W): Checks for busy state/Holds counters
0 (R/W): Normal operation
For the operation of this bit, see the description of RTCBSY (D1) above.