
I S1C33E07 SPECIFICATIONS: PIN DESCRIPTION
S1C33E07 TECHNICAL MANUAL
EPSON
I-3-5
I
Pin
Table I.3.2.4 Input/Output Port and Peripheral Circuit Pin List
I/O
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
i/
O
(H)
i/
O
(H)
i/
O
(H)
I/o
(Hi-Z)
I/o
(Hi-Z)
I/o
(Hi-Z)
Pull-
up/down
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
100k PU
1
Function
P00:
General-purpose I/O port (default)
SIN0:
Serial I/F Ch.0 data input
#DMAACK2: HSDMA Ch.2 acknowledge signal output
P01:
General-purpose I/O port (default)
SOUT0:
Serial I/F Ch.0 data output
#DMAACK3: HSDMA Ch.3 acknowledge signal output
P02:
General-purpose I/O port (default)
#SCLK0:
Serial I/F Ch.0 clock input/output
#DMAEND2: HSDMA Ch.2 end-of-transfer signal output
P03:
General-purpose I/O port (default)
#SRDY0:
Serial I/F Ch.0 ready input/output
#DMAEND3: HSDMA Ch.3 end-of-transfer signal output
P04:
General-purpose I/O port (default)
SIN1:
Serial I/F Ch.1 data input
I2S_SDO:
I2S send data signal
P05:
General-purpose I/O port (default)
SOUT1:
Serial I/F Ch.1 data output
I2S_WS:
I2S word select signal
P06:
General-purpose I/O port (default)
#SCLK1:
Serial I/F Ch.1 clock input/output
I2S_SCK:
I2S serial clock signal
P07:
General-purpose I/O port (default)
#SRDY1:
Serial I/F Ch.1 ready input/output
I2S_MCLK: I2S master clock signal
P10:
General-purpose I/O port (default)
TM0:
16-bit timer 0 output
SIN0:
Serial I/F Ch.0 data input
#DMAEND0: HSDMA Ch.0 end-of-transfer signal output
P11:
General-purpose I/O port (default)
TM1:
16-bit timer 1 output
SOUT0:
Serial I/F Ch.0 data output
#DMAEND1: HSDMA Ch.1 end-of-transfer signal output
P12:
General-purpose I/O port (default)
TM2:
16-bit timer 2 output
#SCLK0:
Serial I/F Ch.0 clock input/output
#DMAACK0: HSDMA Ch.0 acknowledge signal output
P13:
General-purpose I/O port (default)
TM3:
16-bit timer 3 output
#SRDY0:
Serial I/F Ch.0 ready input/output
#DMAACK1: HSDMA Ch.1 acknowledge signal output
P14:
General-purpose I/O port (default)
TM4:
16-bit timer 4 output
SIN1:
Serial I/F Ch.1 data input
DST0:
DST0 signal output for debugging (default)
P15:
General-purpose I/O port
TM5:
16-bit timer 5 output
SOUT1:
Serial I/F Ch.1 data output
TFT_CTL0: LCDC TFT I/F control signal 0 output
DST1:
DST1 signal output for debugging (default)
P16:
General-purpose I/O port
DCSIO0:
DCSIO port
#SCLK1:
Serial I/F Ch.1 clock input/output
TFT_CTL3: LCDC TFT I/F control signal 3 output
DPCO:
DPCO signal output for debugging (default)
P17:
General-purpose I/O port
DCSIO1:
DCSIO port
#SRDY1:
Serial I/F Ch.1 ready input/output
TFT_CTL2: LCDC TFT I/F control signal 2 output
P30:
General-purpose I/O port (default)
CARD2:
Card I/F signal 2 output
#DMAREQ0: HSDMA Ch.0 request input
P31:
General-purpose I/O port (default)
CARD3:
Card I/F signal 3 output
#DMAREQ1: HSDMA Ch.1 request input
P32:
General-purpose I/O port (default)
CARD4:
Card I/F signal 4 output
#DMAREQ2: HSDMA Ch.2 request input
QFP
12
13
14
15
17
18
19
20
21
22
24
25
26
27
28
29
8
9
10
Pin No.
Pin name
P00
SIN0
#DMAACK2
P01
SOUT0
#DMAACK3
P02
#SCLK0
#DMAEND2
P03
#SRDY0
#DMAEND3
P04
SIN1
I2S_SDO
P05
SOUT1
I2S_WS
P06
#SCLK1
I2S_SCK
P07
#SRDY1
I2S_MCLK
P10
TM0
SIN0
#DMAEND0
P11
TM1
SOUT0
#DMAEND1
P12
TM2
#SCLK0
#DMAACK0
P13
TM3
#SRDY0
#DMAACK1
P14
TM4
SIN1
DST0
P15
TM5
SOUT1
TFT_CTL0
DST1
P16
DCSIO0
#SCLK1
TFT_CTL3
DPCO
P17
DCSIO1
#SRDY1
TFT_CTL2
P30
CARD2
#DMAREQ0
P31
CARD3
#DMAREQ1
P32
CARD4
#DMAREQ2
PFBGA
E2
F2
E3
F1
G2
F3
G1
G3
H1
H2
J4
J2
H3
J1
J3
K2
D1
D3
E4