I S1C33E07 SPECIFICATIONS: CPU CORE AND BUS ARCHITECTURE
I-5-4
EPSON
S1C33E07 TECHNICAL MANUAL
Classification
Data transfer
System control
Immediate extension
Bit manipulation
Other
Function
General-purpose register (byte)
→ general-purpose register (sign-extended)
Memory (byte)
→ general-purpose register (sign-extended)
Postincrement possible
Stack (byte)
→ general-purpose register (sign-extended)
General-purpose register (byte)
→ memory
Postincrement possible
General-purpose register (byte)
→ stack
General-purpose register (byte)
→ general-purpose register (zero-extended)
Memory (byte)
→ general-purpose register (zero-extended)
Postincrement possible
Stack (byte)
→ general-purpose register (zero-extended)
General-purpose register (halfword)
→ general-purpose register (sign-extended)
Memory (halfword)
→ general-purpose register (sign-extended)
Postincrement possible
Stack (halfword)
→ general-purpose register (sign-extended)
General-purpose register (halfword)
→ memory
Postincrement possible
General-purpose register (halfword)
→ stack
General-purpose register (halfword)
→ general-purpose register (zero-extended)
Memory (halfword)
→ general-purpose register (zero-extended)
Postincrement possible
Stack (halfword)
→ general-purpose register (zero-extended)
General-purpose register (word)
→ general-purpose register
Immediate
→ general-purpose register (sign-extended)
Memory (word)
→ general-purpose register
Postincrement possible
Stack (word)
→ general-purpose register
General-purpose register (word)
→ memory
Postincrement possible
General-purpose register (word)
→ stack
No operation
HALT
SLEEP
Extend operand in the following instruction
Test a specified bit in memory data
Clear a specified bit in memory data
Set a specified bit in memory data
Invert a specified bit in memory data
Bytewise swap on byte boundary in word
Push general-purpose registers %rs–%r0 onto the stack
Pop data for general-purpose registers %rd–%r0 off the stack
ld.b
ld.ub
ld.h
ld.uh
ld.w
nop
halt
slp
ext
btst
bclr
bset
bnot
swap
pushn
popn
%rd,%rs
%rd,[%rb]
%rd,[%rb]+
%rd,[%sp+imm6]
[%rb],%rs
[%rb]+,%rs
[%sp+imm6],%rs
%rd,%rs
%rd,[%rb]
%rd,[%rb]+
%rd,[%sp+imm6]
%rd,%rs
%rd,[%rb]
%rd,[%rb]+
%rd,[%sp+imm6]
[%rb],%rs
[%rb]+,%rs
[%sp+imm6],%rs
%rd,%rs
%rd,[%rb]
%rd,[%rb]+
%rd,[%sp+imm6]
%rd,%rs
%rd,sign6
%rd,[%rb]
%rd,[%rb]+
%rd,[%sp+imm6]
[%rb],%rs
[%rb]+,%rs
[%sp+imm6],%rs
imm13
[%rb],imm3
%rd,%rs
%rs
%rd
Mnemonic
The symbols in the above table each have the meanings specified below.
Table I.5.3.2 Symbol Meanings
Symbol
%rs
%rd
%ss
%sd
[%rb]
[%rb]+
%sp
imm2,imm4,imm3,
imm5,imm6,imm10,
imm13
sign6,sign8
Description
General-purpose register, source
General-purpose register, destination
Special register, source
Special register, destination
General-purpose register, indirect addressing
General-purpose register, indirect addressing with postincrement
Stack pointer
Unsigned immediate (numerals indicating bit length)
However, numerals in shift instructions indicate the number of bits
shifted, while those in bit manipulation indicate bit positions.
Signed immediate (numerals indicating bit length)