
V PERIPHERAL MODULES 3 (INTERFACE): GENERAL-PURPOSE SERIAL INTERFACE (EFSIO)
V-1-18
EPSON
S1C33E07 TECHNICAL MANUAL
V.1.4.2 Setting Asynchronous Interface
When performing asynchronous transfer via the serial interface, the following must be done before data transfer can
be started:
1. Setting input/output pins
2. Setting the interface mode
3. Setting the transfer mode
4. Setting the input clock
5. Setting the data format
6. Setting the receive FIFO level
7. Setting interrupt/IDMA/HSDMA
The following describes how to set each of the above. For details on interrupt/DMA settings, refer to Section V.1.7,
“Serial Interface Interrupts and DMA.”
Note: Always make sure the serial interface is inactive (TXENx (D7/0x300Bx3) and RXENx (D6/
0x300Bx3) = 0) before making these settings. A change in settings during operation may result in
a malfunction.
TXENx: Serial I/F Ch.x Transmit Enable Bit in the Serial I/F Ch.x Control Register (D7/0x300Bx3)
RXENx: Serial I/F Ch.x Receive Enable Bit in the Serial I/F Ch.x Control Register (D6/0x300Bx3)
Setting input/output pins
In the asynchronous mode, two pins—SINx and SOUTx—are used. When external clock input is used, one
more pin, #SCLKx, is also used. Configure the Port Function Select Registers to enable these pin functions
according to the channel to be used (two or more channel can be used simultaneously). For details of pin func-
tions and how to switch over, see Section I.3.3, “Switching Over the Multiplexed Pin Functions.”
Setting the interface mode
Initialize IRMDx[1:0] (D[1:0]/0x300Bx4) by writing 0b00 when using the serial interface as a normal interface,
or 0b10 when using the serial interface as an IrDA interface. This setting must be made before a transfer mode
is set.
IRMDx[1:0]: Serial I/F Ch.x Interface Mode Select Bits in the Serial I/F Ch.x IrDA Register (D[1:0]/0x300Bx4)
Also 7816MD1[1:0] (D[1:0]/0x300B1A) must be set to 0b00 in Ch.1.
7816MD1[1:0]: Serial I/F Ch.1 ISO7816 Mode Select Bits in the Serial I/F Ch.1 ISO7816 Mode Control
Register (D[1:0]/0x300B1A)
Setting the transfer mode
Use SMDx[1:0] (D[1:0]/0x300Bx3) to set the transfer mode of the serial interface as described earlier. When
using the serial interface in the 8-bit asynchronous mode, set SMDx[1:0] (D[1:0]/0x300Bx3) to 0b11, when us-
ing the serial interface in the 7-bit asynchronous mode, set SMDx[1:0] (D[1:0]/0x300Bx3) to 0b10.
SMDx[1:0]: Serial I/F Ch.x Transfer Mode Select Bits in the Serial I/F Ch.x Control Register (D[1:0]/0x300Bx3)
Setting the input clock
In the asynchronous mode, the operating clock can be selected between the internal clock and an external clock
using SSCKx (D2/0x300Bx3).
SSCKx: Serial I/F Ch.x Input Clock Select Bit in the Serial I/F Ch.x Control Register (D2/0x300Bx3)
The external clock is selected (input from the #SCLKx pin) by writing 1 to SSCKx (D2/0x300Bx3), and an in-
ternal clock is selected by writing 0.
Note: SSCKx (D2/0x300Bx3) becomes indeterminate at initial reset, so be sure to reset it in the soft-
ware.