Lucent Technologies Inc.
Lucent Technologies Inc.
59
Preliminary Data Sheet
October 2000
T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)
Frame Formats
(continued)
T1 Robbed-Bit Signaling
To enable signaling, register FRM_PR44 bit 0 (TSIG) must be set to 0.
Robbed-bit signaling, used in either ESF or SF framing formats, robs the eighth bit of the voice channels of every
sixth frame. The signaling bits are designated A, B, C, and D, depending on the signaling format used. The robbed-
bit signaling format used is defined by the state of the F and G bits in the signaling registers (see DS1: Robbed-Bit
Signaling). The received channel robbed-bit signaling format is defined by the corresponding transmit signaling F
and G bits. Table 28 shows the state of the transmitted signaling bits as a function of the F and G bits.
Table 28. Robbed-Bit Signaling Options
* See register FRM_PR43 bit 3 and bit 4.
The robbed-bit signaling format for each of the 24 T1 transmit channels is programmed on a per-channel basis by
setting the F and G bits in the transmit signaling direction.
SLC-96 9-State Signaling
SLC-96 9-state signaling state is enabled by setting both the F and G bits in the signaling registers to the 0 state,
setting the SLC-96 signaling control register FRM_PR43 bit 3 to 1, and setting register FRM_PR44 bit 0 to 0. Table
29 shows the state of the transmitted signaling bits to the line as a function of the A, B, C and D bit settings in the
transmit signaling registers. In Table 29 below, X indicates either a 1 or a 0 state, and T indicates a toggle, transition
from either 0 to 1 or 1 to 0, of the transmitted signaling bit.
In the line receive direction, this signaling mode functions identically to the preceding transmit path description.
Table 29. SLC-96 9-State Signaling Format
G
F
Robbed-Bit Signaling Format
Frame
6
A
12
B
18
C
24
D
0
0
ESF: 16-State
SLC*: 9-State, 16-State
4-State
Data channel (no signaling)
2-State
0
1
1
1
0
1
A
B
A
B
PAYLOAD DATA
A
A
A
A
Transmit Signaling Register Settings
Transmit to the Line Signal Bits
SLC-96 Signaling States
State 1
State 2
State 3
State 4
State 5
State 6
State 7
State 8
State 9
A
0
0
0
0
0
0
1
1
1
B
0
0
1
0
0
1
0
0
1
C
0
0
0
1
1
1
X
X
X
D
0
1
X
0
1
X
0
1
X
A = f(A,C)
0
0
0
T
T
T
1
1
1
B = f(B,D)
0
T
1
0
T
1
0
T
1