- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371179 > T7630 T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II) PDF資料下載
參數(shù)資料
| 型號： | T7630 |
| 英文描述： | T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II) |
| 中文描述： | T7630雙T1/E1的5.0V的短途終結(jié)者（終結(jié)者-Ⅱ） |
| 文件頁數(shù)： | 71/210頁 |
| 文件大?。?/td> | 3075K |
| 代理商： | T7630 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當(dāng)前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁
Lucent Technologies Inc.
Lucent Technologies Inc.
71
Preliminary Data Sheet
October 2000
T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)
Frame Formats
(continued)
CEPT Loss of Time Slot 16 Multiframe Align-
ment (LTS16MFA)
Loss of basic frame alignment forces the receive framer
into a loss of time slot 16 signaling multiframe align-
ment state. In addition, as defined in ITU Rec. G.732
Section 5.2, time slot 16 signaling multiframe is
assumed lost when two consecutive time slot 16 multi-
frame 4-bit all-zero patterns is received with an error.
Also, the time slot 16 multiframe is assumed lost when,
for a period of two multiframes, all bits in time slot 16
are in state 0. This state is reported by way of the sta-
tus registers FRM_SR1 bit 1. Once basic frame align-
ment is achieved, the receive framer will initiate a
search for the time slot 16 multiframe alignment. During
a loss of time slot 16 multiframe alignment state:
I
The updating of the signaling data is halted.
I
The received control bits forced to the binary 1 state.
I
The received remote multiframe alarm indication sta-
tus bit is forced to the binary 0 state.
I
Optionally, the transmit framer can transmit to the
line the time slot 16 signaling remote multiframe
alarm if register FRM_PR41 bit 4 is set to 1.
I
Optionally, the transmit framer can transmit the alarm
indication signal (AIS) in the system transmit time
slot 16 data if register FRM_PR44 bit 6 is set to 1.
CEPT Loss of Time Slot 16 Multiframe Align-
ment Recovery Algorithm
The time slot 16 multiframe alignment recovery algo-
rithm is as described in ITU Rec. G.732 Section 5.2.
The recommendation states that if a condition of
assumed frame alignment has been achieved, time slot
16 multiframe alignment is deemed to have occurred
when the 4-bit time slot 16 multiframe pattern of 0000
is found in time slot 16 for the first time, and the preced-
ing time slot 16 contained at least one bit in the binary
1 state.
CEPT Time Slot 0 FAS/NOT FAS Control
Bits
FAS/NOT FAS Si- and E-Bit Source
The Si bit can be used as an 8 kbits/s data link to and
from the remote end, or in the CRC-4 mode, it can be
used to provide added protection against false frame
alignment. The sources for the Si bits that are transmit-
ted to the line are the following:
I
CEPT with no CRC-4 and FRM_PR28 bit 0 = 1: the
TSiF control bit (FRM_PR28 bit 1) is transmitted in
bit 1 of all FAS frames and the TSiNF control bit
(FRM_PR28 bit 2) is transmitted in bit 1 of all NOT
FAS frames.
I
The CHI system interface (CEPT with no CRC-4 and
FRM_PR28 bit 0 = 0)
*
.
This option requires the received system data (RCHI-
DATA) to maintain a biframe alignment pattern where
frames containing Si bit information for the NOT FAS
frames have bit 2 of time slot 0 in the binary 1 state fol-
lowed by frames containing Si bit information for the
FAS frames that have bit 2 of time slot 0 in the binary 0
state. This ensures the proper alignment of the Si
received system data to the transmit line Si data.
Whenever this requirement is not met by the system,
the transmit framer will enter a loss of biframe align-
ment condition (indication is given in the status regis-
ters) and then search for the pattern; in the loss of
biframe alignment state, transmitted line data is cor-
rupted (only when the system interface is sourcing Sa
or Si data). When the transmit framer locates a new
biframe alignment pattern, an indication is given in the
status registers and the transmit framer resumes nor-
mal operations.
I
CEPT with CRC-4
: manual transmission of
E bit = 0:
— If FRM_PR28 bit 0 = 0, then the TSiF bit
(FRM_PR28 bit 1) is transmitted in bit 1 of frame
13 (E bit) and the TSiNF bit (FRM_PR28 bit 2) is
transmitted in bit 1 of frame 15 (E bit).
— If FRM_PR28 bit 0 = 1, then each time 0 is written
into TSiF (FRM_PR28 bit 1) one E bit = 0 is trans-
mitted in frame 13, and each time 0 is written into
TSiNF (FRM_PR28 bit 2) one E bit = 0 is transmit-
ted in frame 15.
* Whenever bits (e.g., Si, Sa, etc.) are transmitted from the system
transparently, FRM_PR29 must first be momentarily written to
001xxxxx (binary). Otherwise, the transmit framer will not be able
to locate the biframe alignment.
The receive E-bit processor will halt the monitoring of received E
bits during loss of CRC-4 multiframe alignment.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T7630 | Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)(雙 T1/E1 5.0V短距離通信終端器) |
| T8100A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8102A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8105A | H.100/H.110 Interface and Time-Slot Interchangers |
| T8100 | H.100/H.110 Interface and Time-Slot Interchanger |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7630426 | 制造商:COOPER INDUSTRIES 功能描述:CC ACCESYS / #2450 3/8 Spring Snap Link Stainless Steel UPC Tagged |
| T-7630-TL2-DB | 制造商:Legerity 功能描述:5V DUAL T1/E1 SHORT-HAUL TERMINATOR |
| T7633 | 制造商:AGERE 制造商全稱:AGERE 功能描述:Dual T1/E1 3.3 V Short-Haul Terminator |
| T7645036 | 功能描述:手工工具 Campbell Snap Link #2450, 7/16", Steel RoHS:否 制造商:Molex 產(chǎn)品:Extraction Tools 類型: 描述/功能:Extraction tool |
| T7645106 | 制造商:COOPER INDUSTRIES 功能描述:CC ACCESYS / #7350 1/8 Quick Link Steel Zinc Plated UPC Tagged |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。