參數(shù)資料
型號: T7630
英文描述: T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)
中文描述: T7630雙T1/E1的5.0V的短途終結(jié)者(終結(jié)者-Ⅱ)
文件頁數(shù): 62/210頁
文件大?。?/td> 3075K
代理商: T7630
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62
LLucent Technologies Inc.
Preliminary Data Sheet
October 2000
T7630 Dual T1/E1 5.0 V Short-Haul Terminator (Terminator-II)
Frame Formats
(continued)
CEPT 2.048 Basic Frame Structure
The ITU Rec. G.704 Section 2.3.1 defined frame length is 256 bits, numbered 1 to 256. The frame repetition rate is
8 kHz. The allocation of bits numbered 1 to 8 of the frame is shown in Table 31.
Table 31. Allocation of Bits 1 to 8 of the FAS Frame and the NOT FAS Frame
Basic Frames
Bit 1
(MSB)
Si
Si
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
(LSB)
1
Sa8
Frame Alignment Signal (FAS)
Not Frame Alignment Signal (NOT FAS)
0
1
0
A
1
1
0
1
Sa4
Sa5
Sa6
Sa7
The function of each bit in Table 31 is described below:
I
The Si bits are reserved for international use. A spe-
cific use for these bits is described in Table 32. If no
use is realized, these bits should be fixed at one on
digital paths crossing an international border.
I
Bit 2 of the NOT FAS frames is fixed to one to assist
in avoiding simulations of the frame alignment signal.
I
Bit 3 of the NOT FAS is the remote alarm indication
(A bit). In undisturbed operation, this bit is set to 0; in
alarm condition, set to one.
I
Bits 4—8 of the NOT FAS (Sa4—Sa8) may be rec-
ommended by ITU for use in specific point-to-point
applications. Bit Sa4 may be used as a message-
based data link for operations, maintenance, and
performance monitoring. If the data link is accessed
at intermediate points with consequent alterations to
the Sa4 bit, the CRC-4 bits must be updated to retain
the correct end-to-end path termination functions
associated with the CRC-4 procedure. The receive
framer does not implement the CRC-4 modifying
algorithm described in TU Rec. G.706 Annex C. Bits
Sa4—Sa8, where these are not used, should be set
to one on links crossing an international border.
I
MSB = most significant bit and is transmitted first.
I
LSB = least significant bit and is transmitted last.
Transparent Framing Format
The transmit framer can be programmed to transpar-
ently transmit 256 bits of system data to the line. The
transmit framer must be programmed to either trans-
parent framing mode 1 or transparent framing mode 2
(see Framer Reset and Transparent Mode Control Reg-
ister (FRM_PR26) on page 174).
In transparent mode 1 or mode 2, the transmit framer
transmits all 256 bits of the RCHI payload unmodified
to the line. Time slot 1 of the RCHI, determined by the
RCHIFS signal, is inserted into the FAS/NOTFAS time
slot of the transmit line interface.
Frame integrity is maintained in both the transmit and
receive framer sections.
5-5988(F)
Figure 25. CEPT Transparent Frame Structure
In transparent framing mode 1, the receive framer is forced
not
to reframe on the receive line data. Other than bipo-
lar violations and unframed AIS monitoring, there is
no
processing of the receive line data. The entire receive line
payload is transmitted unmodified to the CHI.
In transparent framing mode 2, the receive framer functions normally on the receive line data. All normal monitoring
of receive line data is performed and data is transmitted to the CHI as programmed.
TIME SLOT 1
32 TIME-SLOT CHI FRAME
TIME SLOT 2
TIME SLOT 3
TIME SLOT 31 TIME SLOT 32
TIME SLOT 1
32 TIME-SLOT LINE FRAME
TIME SLOT 2
TIME SLOT 3
TIME SLOT 31 TIME SLOT 32
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