- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361647 > V363EPC-50 Controller Miscellaneous - Datasheet Reference PDF資料下載
參數(shù)資料
| 型號(hào)： | V363EPC-50 |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 117/190頁(yè) |
| 文件大?。?/td> | 1105K |
| 代理商： | V363EPC-50 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)當(dāng)前第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)
1
2
3
4
5
6
7
7
8
9
11
11
12
13
14
15
16
17
18
19
20
21
I2O Interface
Inbound/Outbound Queue Management
Copyright 1997-2000, V3 Semiconductor Inc.
EPC User
’
s Manual Revision 1.05
107
respective head or tail pointer to be incremented. If pushing or popping is accomplished by
the external PCI agent then the respective pointer is automatically incremented by the EPC.
Pointers that are managed by the local processor are also updated by it under software
control.
It is important to follow an orderly initialization process for the pointers. Typically all the
pointers would be initialized by the local processor. Once the queues have been initialized
and the ONLINE bit in the QBA_MAP register has been set, the local processor will be
unable to modify the contents of any of the pointers controlled by the host driver namely
OFL_HEAD, OPL_TAIL, IPL_HEAD and IFL_TAIL. These are maintained automatically
when the Inbound/Outbound ports are read by the PCI agent as the above table indicates.
12.3.1.1
Pointer Format
Each pointer is a 32 bit address into local memory. Since pointers are always aligned to a
32 bit boundary, the low 2 bits (bits 1-0) are read only (
‘
0
’
). The upper 12 bits of the address
(bits 31-20) of all 8 pointers are derived from a single register - the Queue Base Address
register (QBA_MAP) described in the next section. The format of each of the 8 pointer
registers is described in the next diagram:
Figure 55Figure 3 Pointer Register Bit Format
Only 4 of the pointers are automatically incremented by hardware. These are OFL_HEAD,
OPL_TAIL, IPL_HEAD and IFL_TAIL. Incrementing is always done on a modulo boundary
of queue size (queue size is determined by the QBA_MAP register described in the next
section). The pointer format diagram above shows where those modulo boundaries occur
for each of the queue size options. As an example, consider a queue size of 4K entries
Table 18: I2O Queue Pointers
Reg. Name
Offset
Description
Pointer Maintenance
OFL_HEAD
0xBC
Outbound Free List Head Pointer PCI write of Outbound Port auto-increments
OFL_TAIL
0xB8
Outbound Free List Tail Pointer
Updated by local processor
OPL_HEAD
0xB4
Outbound Post List Head Pointer Updated by local processor
OPL_TAIL
0xB0
Outbound Post List Tail Pointer
PCI read of Outbound Port auto-increments
IPL_HEAD
0xAC
Inbound Post List Head Pointer
PCI write of Inbound Port auto-increments
IPL_TAIL
0xA8
Inbound Post List Tail Pointer
Updated by local processor
IFL_HEAD
0xA4
Inbound Free List Head Pointer
Updated by local processor
IFL_TAIL
0xA0
Inbound Free List Tail Pointer
PCI read of Inbound Port auto-increments
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
QBA_MAP bits 31-20 (read only)
8
7
6
5
4
3
2
1
0
Read/Write Bits
Auto Incremented for QSIZE=4
Auto Incremented for QSIZE=3
Auto Incremented for QSIZE=2
Auto Incremented for QSIZE=1
Auto Incremented for QSIZE=0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V363ME01-LF | VOLTAGE CONTROLLED OSCILLATOR |
| V370PDC-66 | DRAM Controller |
| V375A12M300A2L | Analog IC |
| V375A12M300A3 | Analog IC |
| V375A12M300A3L | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V363EPC-50LP | 制造商:Rochester Electronics LLC 功能描述: 制造商:QuickLogic Corporation 功能描述: |
| V363EPC-50LPN | 制造商:Rochester Electronics LLC 功能描述: 制造商:QuickLogic Corporation 功能描述: |
| V363ME01-LF | 制造商:ZCOMM 制造商全稱:ZCOMM 功能描述:Voltage-Controlled Oscillator Surface Mount Module |
| V363ME01-LF_10 | 制造商:ZCOMM 制造商全稱:ZCOMM 功能描述:Voltage-Controlled Oscillator Surface Mount Module |
| V364 | 制造商:VARTA 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。