Copyright 1997-2000, V3 Semiconductor Inc.
EPC User
’
s Manual Revision 1.05
1
Chapter 1
Introduction
In a very short period of time the PCI bus standard has moved beyond the PC to become the
most widely accepted high-performance bus standard for embedded applications. As a
leader in providing chipset solutions for high-end embedded applications, V3 Semiconductor
has developed the EPC family of PCI Bridge Components for the Intel i960
and the AMD
Am29K
TM
processor family. The EPC is specifically designed to take advantage of the key
features of the i960/Am29K family of processors to deliver the highest performance possible
for embedded PCI systems.
The EPC is the new enhanced version of the previous generation of PCI Bridges known as
the PBC. The V350EPC is backward compatible (register and pin) with the V960PBC and
the V961PBC devices. The V360EPC is backward compatible (register and pin) with the
V962PBC and the V292PBC. The V363EPC is the new 3.3v optimized version of the
V350EPC and the V360EPC, and it is also backward compatible (register and pin) to both
devices. A block diagram of the EPC is shown in Figure 1.
Some of the key features of the EPC are:
Glueless interface to i960/Am29K processors
Compliant with PCI 2.1 specification
PICMG CompactPCI Hot Swap Capable
Configurable for system host, bus master, and target operation
Burst access support on both local and PCI interfaces
PCI-to-Local and Local-to-PCI address space remapping
2 PCI-to-Local and 2 Local-to-PCI data transfer apertures
640 bytes of programmable FIFO storage with DYNAMIC BANDWIDTH
ALLOCATION
On-the-fly byte order (endian) conversion
2 channel DMA controller with DMA Chaining
Bi-directional mailbox registers with doorbell interrupts
Power on configuration via serial EEPROM
Direct connect to VxBMC/CMC or V96SSC DRAM controllers
Direct connect to V380SDC High performance SDRAM controller