Initialization
Initializing the Internal Registers
Copyright 1997-2000, V3 Semiconductor Inc.
EPC User
’
s Manual Revision 1.05
123
After the input reset has been released, 10 SCL clocks are performed followed by a STOP
cycle to ensure that a re-reset didn
’
t falsley see the SDA signal low.
14.2.2
Initialization Using the Local Processor
In applications where the EPC is a secondary master it may be desirable to use the local
processor to initialize the contents of the internal registers of the EPC and save the cost of
the serial EEPROM device. This is best accomplished by pulling the SDA pin high on the
EPC and using PRST# as an input. The processor can be connected as in Figure 63.
Figure 63: Connection for Initialization Using the Local Processor
When connected as in Figure 63, the RETRY_EN bit of the PCI_CFG register will be set
when PRST# is asserted and remain that way until the local CPU clears it. RETRY_EN is
used to cause a PCI configuration access to the EPC to get retried until it is cleared from the
local CPU. This ensures that the local bus CPU gets a chance to properly initialize before
the PCI BIOS tries to enumerate the EPC. Once the local CPU has initalized the internal
registers then RETRY_EN can be cleared to allow the primary PCI master to enumerate the
EPC. Since the RETRY_EN bit is type FR (locked) the sequence that software should use
is: write RETRY_EN with
’
0
’
immediately followed with writing the LOCK bit with
’
1
’
in the
SYSTEM register.
Access to the internal registers from the local bus side is through the
“
local bus-to-internal
register
”
aperture defined by the LB_IO_BASE register. LB_IO_BASE is a sixteen bit
register which defines a field that is compared with address bits A[31:16] for every access
seen on the local bus. When there is a match between LB_IO_BASE and A[31:16], that
access is
“
claimed
”
by the EPC and is considered to be to an access to the internal
registers. The local-to-internal register aperture has a granularity of 64Kbytes (since only
A[31:16] are compared) even though only the first 256 bytes are used. The remaining space
is reserved.
As an example, let
’
s assume LB_IO_BASE is programmed to the value 1234H. To read the
PCI_CC_REV register (offset 08H) you would perform a word read from location
1234.0008H in local memory. Care must be taken when using big-endian processors (or big-
endian regions with little-endian processors) to generate the proper addresses, as
configuration space is little-endian (by PCI definition).
In order for the LB_IO_BASE decoder to respond to a local bus cycle at the desired memory
location, it must be configured. There are 3 ways to do this:
PRST#
PRST
LRST
SDA
V350EPC/V360EPC
CPU
RESET