Local Bus Interface
BTERM Operation (961 and 962 mode Only)
84
EPC User
’
s Manual Revision 1.05
Copyright 1997-2000, V3 Semiconductor Inc.
Figure 41: BTERM as in Input
Additionally, the assertion of BTERM can be used in conjunction with the de-assertion of
HLDA to give another local bus master ownership of the bus so that the EPC won
’
t "hog" the
bus when long bursts are performed. When a burst is terminated (with or without BTERM
asserted) and more data transfer is pending, the EPC will drop its
’
HOLD request for one
cycle at the end of the burst if the HLDA signal is taken away before the end of the cycle
thus allowing another higher priority master to gain control of the bus. This is NOT the way
that i960 processor usually drives its
’
HLDA output. Thus HLDA back to the EPC must be
driven by a gated version of HLDA from the processor - typically from an arbiter device. The
following diagram (Figure 42) illustrates the sequence.
Figure 42: Early Suspension of EPC Local Bus Ownership
BTERM must not be used to break bursts for non-32 bit regions except at a 32 bit boundary
otherwise data corruption can occur.
In summary, the BTERM used as an input will terminate bursts similar to a PCI burst
disconnect. When the HLDA input is used with BTERM, a high priority local bus device can
gain access to the local bus by kicking off the EPC early.
8.4.2
Deadlock Avoidance using the BTERM as an Output
The BTERM signal can be used to indicate a time-out condition when a local bus master is
trying to access the PCI bus through one of the EPC apertures. This operation is enabled
through the LB_CFG register bit 9. When enabled, a time-out condition (as defined in the
description given in the LB_CFG register) will cause the normally high-Z BTERM signal to
be driven low for one LCLK and then high for one clock before being returned to its
’
high-Z