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參數(shù)資料
| 型號(hào)： | IP100 |
| 英文描述： | PCI 10/100M Single Chip Ethernet Controller |
| 中文描述： | 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器 |
| 文件頁數(shù)： | 10/92頁 |
| 文件大?。?/td> | 2801K |
| 代理商： | IP100 |
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IP100
values in RxDMABurstThresh determine how many
bytes of a frame must be received into RxFIFO
before RxDMA Logic is allowed to begin data
transfer.
5.9
EEPROM Interface
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
10/92
IP100-DS-R03
May 27, 2003
AsicCtrl (least significant 16 bits)
SubsystemVendorId
SubsystemId
StationAddress
Data
There are several other registers which must be
configured by the host during initialization. These
registers include the IP100 PCI configuration
registers which are set during a Power On Self Test
(POST) routine performed by the host system.
Specifically, the registers set during this stage of
initialization are:
ConfigCommand enables adapter operation
by allowing it to respond to and generate PCI
bus cycles. ConfigCommand is also used to
enable parity error generation.
loBaseAddress sets the I/O base address for
the IP100 registers.
MemBaseAddress sets the memory base
address for the IP100 registers.
ExpRomBaseAddress sets the base address
and size for an installed expansion ROM, if
any.
CacheLineSize indicates the system’s cache
line size. This value is used by the IP100 to
optimize bus master data transfers.
LatencyTimer sets the length of time the
IP100 can hold the PCI bus as a bus master.
InterruptLine maps IP100’s interrupt request
to a specific interrupt line (level) on the
system board.
AsicCtrl is used to setup internal operations
and parameters.
The IP100 can be accessed across the PCI bus
without setting the PCI registers or loading data
from an external EEPROM. In this Forced
Configuration
mode
(useful
applications without an EEPROM), the IP100 is
configured as follows:
I/O base address 0x200
I/O target cycles enabled
Memory target cycles disabled
Bus master cycles enabled
Expansion ROM cycles disabled
6.2
Register Programming
The external serial EEPROM is used for non-volatile
storage of such information as the node address,
system ID, and default configuration settings. As
part of initialization after system reset, the IP100
reads from the EEPROM and places the data into
certain host-accessible registers.
5.10 Expansion ROM Interface
The IP100 provides support for an optional
Expansion ROM. The Expansion ROM is configured
through the PCI configuration register, which maps
the ROM into the memory space of the host system.
The ROM contents can be scanned, copied to
system RAM, and executed at system initialization
time.
The ROM is also byte-read and byte-write
accessible to the host CPU using the ExpRomData
and ExpRomAddr registers. This allows a diagnostic
program to read or modify the ROM contents
without having to write to configuration registers.
The Expansion ROM pins are shared with the
Modem Interface pins, as use of an Expansion ROM
is not permitted in multi-function applications.
6
Operation
for
embedded
6.1
Initialization
The IP100 provides several resets. The assertion of
the hardware reset signal on the PCI bus causes a
complete reset of the IP100. A similar reset is
available via software using the GlobalReset bit of
the AsicCtrl register. The AsicCtrl register also
allows for selective reset of particular functional
blocks of the IP100. See the Registers and Data
Structures section for details on using the AsicCtrl
register for resetting the IP100.
Shortly after reset, the IP100 will read the contents
of an external EEPROM, placing the data read into
the following registers:
ConfigParm
After initialization, an additional set of registers
specific to operation of the Ethernet network must
be programmed.
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| IP101 | PHY 10/100M Single Chip Fast Ethernet Transceiver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IP1000A | 制造商:IC PLUS 功能描述:IP1000A |
| IP1000ALF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R02 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
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