參數(shù)資料
型號(hào)： IP100
英文描述： PCI 10/100M Single Chip Ethernet Controller
中文描述： 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器
文件頁(yè)數(shù)： 22/92頁(yè)
文件大小： 2801K
代理商： IP100
IP100
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
22/92
IP100-DS-R03
May 27, 2003
BIT
3
BIT NAME
Auto-Negotiation
Ability
R/W
R
BIT DESCRIPTION
1 = Auto-Negotiation capable.
0 = Auto-Negotiation incapable.
If Auto-Negotiation Ability is a logic 1, the IP100 is capable of
performing Auto-Negotiation. Auto-Negotiation Ability depends on
the external mode setting of the IP100.
1 = Link is up.
0 = Link is down.
When Link Status is a logic 0, Link Status will remain a logic 0 until
the link state changes, and Link Status is read by the host system.
1 = Jabber detected.
0 = Jabber not detected.
When Jabber Detect is a logic 1, Jabber Detect will remain a logic 0
until the jabber condition no longer exists, and Jabber Detect is read
by the host system.
1 = Extended capabilities register exists.
2
Link Status
R
1
Jabber Detect
R
0
Extended Capability
R
10.1.3 PHY Identifier 1
Class............................. PHY Registers
Access Method ............. Accessed through PhyCtrl register
Register Address .......... 0x02
Default .......................... 0x0243
Width ............................ 16 bits
BIT
BIT NAME
15..0
PHY ID Number
R/W
R
BIT DESCRIPTION
Bits 3 through 18 of the OUI.
OUI = 0090C3
10.1.4 PHY Identifier 2
Class............................. PHY Registers
Access Method ............. Accessed through PhyCtrl register
Register Address .......... 0x03
Default .......................... 0x0C40
Width ............................ 16 bits
BIT
BIT NAME
15..10
PHY ID Number
R/W
R
BIT DESCRIPTION
Bits 19 through 24 of the OUI.
OUI = 0090C3
Manufacturer’s model number.
Four bit manufacturer’s revision number.
9..4
3..0
Model Number
Revision Number
R
R
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