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參數(shù)資料
| 型號： | IP100 |
| 英文描述： | PCI 10/100M Single Chip Ethernet Controller |
| 中文描述： | 單芯片的PCI個10/100M以太網(wǎng)控制器 |
| 文件頁數(shù)： | 27/92頁 |
| 文件大?。?/td> | 2801K |
| 代理商： | IP100 |
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IP100
10.2 DMA Data Structures
IP100-DS-R03
May 27, 2003
27/92
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
A TFD is used to move data destined for transmission onto an Ethernet network, from the host system memory to
the transmit FIFO within the IP100. A TFD is 16 to 512 bytes in length, and it’s location in host system memory is
indicated by the value in the TxDMAListPtr register.
A RFD is used to move data obtained from an Ethernet network, from the receive FIFO within the IP100 to the
host system memory. A RFD is 16 to 512 bytes in length, and it’s location in host system memory is indicated by
the value in the RxDMAListPtr register. There are two formats for an RFD, differentiated by the
ImpliedBufferEnable bit of the RxFrameStatus field.
Figure 11 shows the two DMA data structures.
HOST SYSTEM MEMORY
TxDMANextPtr
TxFrameControl
TxDMAFragAddr0
TxDMAFragLen0
TxDMAFragAddr1
TxDMAFragLen1
TxDMAFragAddrn
TxDMAFragLenn
TFD
HOST SYSTEM MEMORY
RxDMANextPtr
RxFrameStatus
RxDMAFragAddr0
RxDMAFragLen0
RxDMAFragAddr1
RxDMAFragLen1
RxDMAFragAddrn
RxDMAFragLenn
RFD
Offset from
TFD Start
0x00
0x04
0x08
0x0c
0x10
0x14
0x08+n*0x08
0x0C+n*0x08
Offset from
RFD Start
0x00
0x04
0x08
0x0c
0x10
0x14
0x08+n*0x08
0x0C+n*0x08
FIGURE 11: TFD and RFD DMA Data Structures
10.2.1 RxDMAFragAddr
Class............................. DMA Data Structures, RFD
Base Address ............... Start of RFD
Address Offset .............. 0x08+n*0x08 for nth fragment (where n=0,1,...63)
Access Mode ................ Read/Write
Width ............................ 32 bits
BIT
BIT NAME
31..0
RxDMAFragAddr
Receive DMA Fragment Address. The RxDMAFragAddr contains the physical
address of a contiguous block of system memory to which receive data is to
be transferred by receive DMA. A fragment can start on any byte boundary.
BIT DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IP101 | PHY 10/100M Single Chip Fast Ethernet Transceiver |
| IP1060AD | Analog IC |
| IP1060AJ | Voltage-Mode SMPS Controller |
| IP1060AN | Analog IC |
| IP1060BJ | Voltage-Mode SMPS Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IP1000A | 制造商:IC PLUS 功能描述:IP1000A |
| IP1000ALF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R02 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
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