參數(shù)資料
型號(hào)： IP100
英文描述： PCI 10/100M Single Chip Ethernet Controller
中文描述： 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器
文件頁(yè)數(shù)： 28/92頁(yè)
文件大?。?/td> 2801K
代理商： IP100
IP100
10.2.2 RxDMAFragLen
Class............................. DMA Data Structures, RFD
Base Address ............... Start of RFD
Address Offset .............. 0x0C+n*0x08 for nth fragment (where n=0,1,...63)
Access Mode ................ Read/Write
Width ............................ 32 bits
The RxDMAFragLen contains fragment length and control information for the block of data pointed to by the
corresponding RxDMAFragAddr.
BIT
BIT NAME
12..0
FragLen
Fragment Length. The length of the contiguous block of data pointed to by the
previous RxDMAFragAddr.
30..13
Reserved
Reserved for future use.
31
RxDMALastFrag
Receive DMA Last Fragment. RxDMALastFrag is set to a logic 1 by the IP100
to indicate the last fragment of the receive frame.
10.2.3 RxDMANextPtr
Class............................. DMA Data Structures, RFD
Base Address ............... Start of RFD
Address Offset .............. 0x00
Access Mode ................ Read/Write
Width ............................ 32 bits
BIT
BIT NAME
31..0
RxDMANextPtr
Receive DMA Next Pointer. RxDMANextPtr contains the physical address of
the next RFD in the receive DMA list. For the last RFD in the receive DMA list,
RxDMANextPtr must be 0x00000000. RFDs must be aligned on 8-byte
physical address boundaries.
10.2.4 RxFrameStatus
Class............................. DMA Data Structures, RFD
Base Address ............... Start of RFD
Address Offset .............. 0x04
Access Mode ................ Read/Write
Width ............................ 32 bits
At the end of a receive DMA transfer, the IP100 writes the value of the RxDMAStatus register to RxFrameStatus.
BIT
BIT NAME
12..0
RxDMAFrameLen
Receive DMA Frame Length. RxDMAFrameLen indicates the true frame
length, except in the case where the frame is larger than the total number of
bytes specified in all of the FragLen subfields of the RxDMAFragLen RFD field
in which case, the RxDMAOverflow bit will be set.
13
Reserved
Reserved for future use.
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
28/92
IP100-DS-R03
May 27, 2003
BIT DESCRIPTION
BIT DESCRIPTION
BIT DESCRIPTION
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