- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360868 > IP100 PCI 10/100M Single Chip Ethernet Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | IP100 |
| 英文描述： | PCI 10/100M Single Chip Ethernet Controller |
| 中文描述： | 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器 |
| 文件頁數(shù)： | 78/92頁 |
| 文件大?。?/td> | 2801K |
| 代理商： | IP100 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁當(dāng)前第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
IP100
10.6.17 MemBaseAddress
Class............................. LAN PCI Configuration Registers, Configuration
Base Address ............... PCI device configuration header start
Address Offset .............. 0x14
Default .......................... 0x00000000
Width ............................ 32 bits
MemBaseAddress can be disabled via loading of the ConfigParm field from an EEPROM during
auto-ini-tialization of the IP100.
BIT
BIT NAME
R/W
0
MemBaseAddrInd
R
Memory Base Address Indicator. When MemBaseAddrInd is a logic
1, MemBaseAddrInd contains the valid memory base address.
2..1
MemMapType
R
Memory Map Type. MemMapType defines how the host system
maps the IP100’s registers within the host system memory space.
Bit 2 of MemMapType is always a logic 0, while bit 1 is loaded from
the Lower1Meg bit of the ConfigParm field within an EEPROM
during auto initialization of the IP100.
BIT 2
BIT 1
0
0
0
1
1
x
6..3
Reserved
N/A
Reserved for future use.
31..7
MemBaseAddress
R/W
Memory Base Address. MemBaseAddress contains the 25 bit
memory base address value. The IP100 uses 128 bytes of I/O space.
10.6.18 MinGnt
Class............................. LAN PCI Configuration Registers, Configuration
Base Address ............... PCI device configuration header start
Address Offset .............. 0x3e
Default .......................... 0x00
Width ............................ 8 bits
BIT
BIT NAME
R/W
7..0
MinGnt
R
Minimum Grant Time. MinGnt specifies, in 250 ns increments, how
long a burst period the IP100 requires when operating as a bus master.
Bits 7 through 4 of the MinGnt value are loaded from the ConfigParm
field within an EEPROM during auto initialization of the IP100.
10.6.19 NextItemPtr
Class............................. LAN PCI Configuration Registers, Power Management
Base Address ............... PCI device configuration header start
Address Offset .............. 0x51
Default .......................... 0x00
Width ............................ 8 bits
BIT
BIT NAME
R/W
7..0
NextItemPtr
R
Next Item Pointer. NextItemPtr indicates the next capability data
structure in the capabilities list. When NextItemPtr is set to the value
0x00, there are no further data structures.
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
78/92
IP100-DS-R03
May 27, 2003
BIT DESCRIPTION
REGISTER MAPPING
Anywhere within a 32 bit address space
Lower 1 megabyte of 32 bit address space
Undefined
BIT DESCRIPTION
BIT DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IP101 | PHY 10/100M Single Chip Fast Ethernet Transceiver |
| IP1060AD | Analog IC |
| IP1060AJ | Voltage-Mode SMPS Controller |
| IP1060AN | Analog IC |
| IP1060BJ | Voltage-Mode SMPS Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IP1000A | 制造商:IC PLUS 功能描述:IP1000A |
| IP1000ALF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R02 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。