參數(shù)資料
型號： IP100
英文描述： PCI 10/100M Single Chip Ethernet Controller
中文描述： 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器
文件頁數(shù)： 13/92頁
文件大?。?/td> 2801K
代理商： IP100
IP100
been transferred by TxDMA when the host system
enters its interrupt service routine. The host system
can traverse the list of TFD’s, examining the
TxDMAComplete bit in each TFD to determine
which frames have been transferred by TxDMA.
The IP100 fetches the TFC before frame data
transfer, and again at the end of TxDMA operation
to examine the TxDMAIndicate bit. This allows the
host system to change TxDMAIndicate while data
transfer of the frame is in progress. For instance, a
frame’s TFD might be at the end of the TxDMAList
when it starts TxDMA, so the host system would
probably set TxDMAIndicate to generate an
interrupt. However, if during the TxDMA process of
this frame, the host system added a new TFD to the
end of the list, it might clear TxDMAIndicate in the
currently active TFD so that the interrupt is delayed
until the next TFD.
The IP100 has the ability to automatically round up
the length of a transmit frame. This is useful in some
NOS environments in which frame lengths need to
be an even number of words. The frame length is
rounded up to either a word or dword boundary,
depending upon the value of WordAlign. Host
systems may disable frame length word-alignment
by
setting
the
WordAlign
TransmitFrameControl to x1.
The MAC will initiate frame transmission (if
transmission is enabled) as soon as either the entire
frame is resident in the TxFIFO register.
As a frame transmits out of the TxFIFO, it is
desirable to be able to release the FIFO space so
that it may be used for another frame. The value
programmed into TxReleaseThresh determines how
much of a frame must be transmitted before its FIFO
space can be released.
6.4
Frame Reception and RxDMA
IP100-DS-R03
May 27, 2003
13/92
Copyright
2003, IC Plus Corp.
All rights reserved.
HOST SYSTEM MEMORY
RxDMANextPtr
RxFrameStatus
1st RxDMAFragAddr
1st RxDMAFragLen
2nd RxDMAFragAddr
2nd RxDMAFragLen
Last RxDMAFragAddr
Last RxDMAFragLen
1st Data Frag (Buffer)
RFD
2nd Data Frag (Buffer)
Last Data Frag (Buffer)
bits
in
the
FIGURE 6: RxDMA Data Structure
The RFD format is covered in the Registers and
Data Structures section.
Similar to TFDs, the resulting linked list of RFDs is
referred to as the RxDMAList. One option available
to RxDMA that differs from TxDMA is that the
RxDMAList can be formed into a ring as shown in
Figure 7. A host system can allocate a number of
full size frame buffers, create a RFD for each one,
and link the RFDs into a circular list. As frames are
received
and
transferred
RxDMAComplete interrupt will be generated for
each frame.
by
RxDMA,
a
The frame RxDMA mechanism is similar to the
TxDMA mechanism. RxDMA is structured around a
linked list of frame descriptors, called RFDs. RFDs
contain pointers to the fragment buffers into which
the IP100 is to place receive data, as shown in
Figure 6.
Preliminary, Specification subject to change without notice.
相關(guān)PDF資料
PDF描述
IP101 PHY 10/100M Single Chip Fast Ethernet Transceiver
IP1060AD Analog IC
IP1060AJ Voltage-Mode SMPS Controller
IP1060AN Analog IC
IP1060BJ Voltage-Mode SMPS Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IP1000A 制造商:IC PLUS 功能描述:IP1000A
IP1000ALF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip
IP1000ALF-DS-R01 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip
IP1000ALF-DS-R02 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip
IP1000ALF-DS-R03 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*