參數(shù)資料
型號(hào)： IP100
英文描述： PCI 10/100M Single Chip Ethernet Controller
中文描述： 單芯片的PCI個(gè)10/100M以太網(wǎng)控制器
文件頁(yè)數(shù)： 30/92頁(yè)
文件大小： 2801K
代理商： IP100
IP100
10.2.5 TxDMAFragAddr
Class............................. DMA Data Structures, TFD
Base Address ............... Start of TFD
Address Offset.............. 0x08+n*0x08 for nth fragment (where n=0,1,...63)
Access Mode................ Read/Write
Width ............................ 32 bits
BIT
BIT NAME
31..0
TxDMAFragAddr
Transmit Fragment Address. TxDMAFragAddr contains the physical address
of a contiguous block of data to be transferred from the host system to the
IP100. A fragment can start on any byte boundary.
10.2.6 TxDMAFragLen
Class............................. DMA Data Structures, TFD
Base Address ............... Start of TFD
Address Offset .............. 0x0C+n*0x08 for nth fragment (where n=0,1,...63)
Access Mode ................ Read/Write
Width ............................ 32 bits
Transmit Fragment Length (TxDMAFragLen) contains fragment length and control information for the block of
data pointed to by the corresponding TxDMAFragAddr.
BIT
BIT NAME
12..0
FragLen
Fragment Length. FragLen is the length of the contiguous block of data
pointed to by TxDMAFragAddr. The maximum fragment length is 8192 bytes.
30..13
Reserved
Reserved for future use.
31
TxDMAFragLast
Transmit DMA Last Fragment. TxDMAFragLast is set by the host system to
indicate the last fragment of the transmit frame and that the IP100 should
proceed to the next TFD.
10.2.7 TxDMANextPtr
Class............................. DMA Data Structures, TFD
Base Address ............... Start of TFD
Address Offset .............. 0x00
Access Mode ................ Read/Write
Width ............................ 32 bits
BIT
BIT NAME
31..0
TxDMANextPtr
Transmit DMA Next Pointer. TxDMANextPtr contains the physical address of
the next TFD in the transmit DMA list. A value of zero for TxDMANextPtr
accompanies the last frame of the list and it indicates there are no more TFD’s
in the transmit DMA list. All TFD’s must be aligned on a 8-byte physical
address boundary.
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
30/92
IP100-DS-R03
May 27, 2003
BIT DESCRIPTION
BIT DESCRIPTION
BIT DESCRIPTION
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