- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360868 > IP100 PCI 10/100M Single Chip Ethernet Controller PDF資料下載
參數(shù)資料
| 型號： | IP100 |
| 英文描述： | PCI 10/100M Single Chip Ethernet Controller |
| 中文描述： | 單芯片的PCI個10/100M以太網(wǎng)控制器 |
| 文件頁數(shù)： | 43/92頁 |
| 文件大?。?/td> | 2801K |
| 代理商： | IP100 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
IP100
10.4.5 EepromCtrl
Class............................. LAN I/O Registers, External Interface Control
Base Address ............... IoBaseAddress register value
Address Offset .............. 0x36
Default .......................... 0x0000
Width ............................ 16 bits
EepromCtrl provides the host with a method for issuing commands to the IP100’s serial EEPROM controller.
Individual 16-bit word locations within the EEPROM may be written, read or erased. Also, the EEPROM’s
WriteEnable, WriteDisable, EraseAll and WriteAll commands can be issued. Two-bit opcodes and 8-bit addresses
are written to this register to cause the IP100 to carry out the desired EEPROM command. If data is to be written
to the EEPROM, the 16-bit data word must be written to EepromData by the host prior to issuing the associated
write command. Similarly, if data is to be read from the EEPROM, the read data will be available via EepromData
register. The EEPROM is a slow device, and it is important that the host system use the EepromBusy bit to
determine when a new command may be issued to the EEPROM.
BIT
BIT NAME
R/W
7..0
EepromAddress
R/W
EEPROM Address. EepromAddress identify one of the 256,
sixteen-bit words to be the target for the ReadRegister,
WriteRegister or EraseRegister commands.
Bits 7 and 6 are further defined to identify a sub-command based on
the value of EepromOpcode. The definition of bits 7 and 6 are valid
when the EepromOpcode in bits 9 and 8 equals 00.
BIT 7
BIT 6
0
0
0
1
1
0
1
1
IP100-DS-R03
May 27, 2003
43/92
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
BIT DESCRIPTION
SUB-COMMAND
WriteDisable
WriteAII
EraseAll
WriteEnable
9..8
EepromOpcode
R/W
EEPROM Operation Code. EepromOpcode specifies one of three
individual commands and a single group of four sub-commands.
BIT 9
BIT 8
OPCODE COMMAND
0
0
Write Enable/Disable & Write/
Erase All sub-commands
0
1
WriteRegister
1
0
ReadRegister
1
1
EraseRegister
Note, after every WriteRegister, EraseRegister opcode, or WriteAll
or EraseAll subcommand, the IP100 will automatically issue a
WriteDisable command to the EEPROM. Therefore, a WriteEnable
command must be issued to the EEPROM prior to every
WriteRegister, EraseRegister opcode, or WriteAll or EraseAll
subcommand.
Reserved for future use.
EEPROM Busy. EepromBusy is a logic 1 during the execution of
EEPROM commands. Further commands should not be issued to
EepromCtrl nor should data be read from Eeprom-Data while
EepromBusy is a logic 1.
14..10
15
Reserved
EepromBusy
N/A
R
相關PDF資料 |
PDF描述 |
|---|---|
| IP101 | PHY 10/100M Single Chip Fast Ethernet Transceiver |
| IP1060AD | Analog IC |
| IP1060AJ | Voltage-Mode SMPS Controller |
| IP1060AN | Analog IC |
| IP1060BJ | Voltage-Mode SMPS Controller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IP1000A | 制造商:IC PLUS 功能描述:IP1000A |
| IP1000ALF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R01 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R02 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
| IP1000ALF-DS-R03 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Gigabit Ethernet NIC Single Chip |
發(fā)布緊急采購，3分鐘左右您將得到回復。