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參數(shù)資料
| 型號(hào)： | AM79C965KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 22/220頁 |
| 文件大?。?/td> | 1197K |
| 代理商： | AM79C965KCW |
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AMD
P R E L I M I N A R Y
118
Am79C965
CERR bit in CSR0. CERR will be asserted in 10BASE-T
mode after transmit if T-MAU is in Link Fail state. CERR
will never cause INTR to be activated. It will, however,
set the ERR bit in CSR0.
Receive Operation
The receive operation and features of the PCnet-32
controller are controlled by programmable options.
Receive Function Programming
Automatic pad field stripping is enabled by setting the
ASTRP_RCV bit in CSR4. this can provide flexibility in
the reception of messages using the 802.3 frame
format.
All receive frames can be accepted by setting the PROM
bit in CSR15. When PROM is set, the PCnet-32 control-
ler will attempt to receive all messages, subject to mini-
mum frame enforcement. Promiscuous mode over rides
the effect of the Disable Receive Broadcast bit on re-
ceiving broadcast frames.
The point at which the BMU will start to transfer data
from the receive FIFO to buffer memory is controlled by
the RCVFW bits in CSR80. The default established dur-
ing H_RESET is 10b which sets the threshold flag at 64
bytes empty.
Automatic Pad Stripping
During reception of an 802.3 frame the pad field can be
stripped automatically.
ASTRP_RCV (CSR4, bit 10) = 1 enables the automatic
pad stripping feature. The pad field will be stripped be-
fore the frame is passed to the FIFO, thus preserving
FIFO space for additional frames. The FCS field will also
be stripped, since it is computed at the transmitting sta-
tion based on the data and pad field characters, and will
be invalid for a receive frame that has had the pad char-
acters stripped.
The number of bytes to be stripped is calculated from
the embedded length field, as defined in the ISO 8802-3
(IEEE/ANSI 802.3) definition, contained in the frame.
The length indicates the actual number of LLC data
bytes contained in the message. Any received frame
which contains a length field less than 46 bytes will have
the pad field stripped (if ASTRP_RCV is set). Receive
frames which have a length field of 46 bytes or greater
will be passed to the host unmodified.
Note that for some network protocols, the value
passed in the Ethernet Type and/or 802.3 Length field is
not
compliant
with
either
standard
and
may
cause problems.
Figure 36 shows the byte/bit ordering of the received
length field for an 802.3 compatible frame format.
Receive FCS Checking
Reception and checking of the received FCS is per-
formed automatically by the PCnet-32 controller. Note
that if the Automatic Pad Stripping feature is enabled,
the FCS for padded frames will be verified against the
value computed for the incoming bit stream including
pad characters, but the FCS value for a padded frame
will not be passed to the host. If an FCS error is detected
in any frame, the error will be reported in the CRC bit
in RMD1.
18219B-43
Preamble
1010....1010
Sync
10101011
Destination
Address
Source
Address
Length
LLC
Data
Pad
FCS
4
Bytes
46 — 1500
Bytes
2
Bytes
6
Bytes
6
Bytes
8
Bits
56
Bits
Start of Frame
at Time = 0
Increasing Time
Bit
0
Bit
7
Bit
0
Bit
7
Most
Significant
Byte
Least
Significant
Byte
1 — 1500
Bytes
45 — 0
Bytes
Figure 36. ISO 8802-3 (IEEE/ANSI 802.3) Data Frame
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