P R E L I M I N A R Y
AMD
157
Am79C965
abled function for this LED
output.
A value of 0 disables the function.
A value of 1 enables the function.
6
LNKSTE
Link Status Enable. Indicates the
current link status on the Twisted
Pair interface. When this bit is
set, a value of ONE will be
passed to the LEDOUT signal to
indicate that the link status state
is PASS. A value of ZERO will be
passed to the LEDOUT signal to
indicate that the link status state
is FAIL.
A value of 0 disables the signal. A
value of 1 enables the signal.
5
RCVME
Receive Match status Enable. In-
dicates receive activity on the
network that has passed the ad-
dress match function for this
node.
All
address
matching
modes are included: Physical,
Logical filtering, Promiscuous,
Broadcast, and EADI.
A value of 0 disables the signal. A
value of 1 enables the signal.
4
XMTE
Transmit status Enable. Indi-
cates PCnet-32 controller trans-
mit activity.
A value of 0 disables the signal. A
value of 1 enables the signal.
3
RXPOLE
Receive Polarity status Enable.
Indicates the current Receive
Polarity condition on the Twisted
Pair interface. A value of ONE in-
dicates that the polarity of the
RXD
± pair has been reversed. A
value of ZERO indicates that the
polarity of the RXD
± pair has not
been reversed.
Receive polarity indication is
valid only if the LNKST bit of
BCR4
indicates
link
PASS
status.
A value of 0 disables the signal. A
value of 1 enables the signal.
2
RCVE
Receive status Enable. Indicates
receive activity on the network.
A value of 0 disables the signal. A
value of 1 enables the signal.
1
JABE
Jabber status Enable. Indicates
that the PCnet-32 controller is
jabbering on the network.
A value of 0 disables the signal. A
value of 1 enables the signal.
0
COLE
Collision status Enable. Indi-
cates collision activity on the net-
work. When the AUI port is
selected, collision activity during
the 4.0
s internal following a
transmit completion (SQE inter-
nal) will not activate the LEDOUT
bit.
A value of 0 disables the signal. A
value of 1 enables the signal.
BCR16: I/O Base Address Lower
Bit
Name
Description
Note that all bits in this register
are programmable through the
EEPROM PREAD operation and
through
the
Software
Relocatable Mode operation.
31-16
RES
Reserved locations. Written as
zeros and read as undefined.
15-5 IOBASEL
I/O Base Address Lower 16 bits.
These bits are used to determine
the location of the PCnet-32 con-
troller in all of I/O space. They
function as bits 15 through 5 of
the I/O address of the PCnet-32
controller. Note that the lowest
five bits of the PCnet-32 control-
ler I/O space are not programma-
ble. These bits are assumed to
be ZEROs. This means that it is
not
possible
to
locate
the
PCnet-32 controller on a space
that does not begin on a 32-byte
block boundary. The value of
IOBASEL is determined in either
of two ways:
1. The IOBASEL value may be
set during the EEPROM read.
2. If no EEPROM exists, or if
there is an error detected in
the EEPROM data, then the
PCnet-32 controller will enter
Software Relocatable Mode,
and a specific sequence of
write accesses to I/O address
378h will cause the IOBASEL
value to be updated. Refer to
the
Software
Relocatable
Mode section of this docu-
ment for more details.
A direct write access to the I/O
Base Address Lower register
may be performed.