TABLE OF CONTENTS (Continued)
Paragraph
Number
Page
Number
Title
MOTOROLA
MPC801 USER’S MANUAL
xix
AppendixB
Applications
B.1
B.1.1
B.1.2
B.1.2.1
B.1.2.2
B.1.3
B.1.3.1
B.1.3.2
B.1.4
B.1.5
B.1.6
B.1.7
B.1.8
B.1.9
B.1.10
B.2
B.2.1
B.2.2
B.2.3
B.2.4
B.3
B.4
B.5
B.5.1
B.6
B.6.1
B.6.2
B.6.3
B.7
B.8
MPC801 Basic Initialization ................................................................. B-1
Programming the UPM .............................................................. B-2
MPC801 MMU/Cache Example ................................................ B-5
Basic MMU and Cache Concept .................................... B-5
General Concept ............................................................ B-5
Memory Management Unit ........................................................ B-6
Memory Protection ....................................................... B-10
MMU Example ............................................................. B-10
M_TWB MMU TABLEWALK BASE REGISTER ..................... B-12
MI_CTR Instruction MMU Control Register ............................. B-12
Mx_AP Instruction/Data Access Protection Register .............. B-13
MD_CTR Data MMU Control Register .................................... B-14
Level One Descriptor Format Register .................................... B-15
Level Two Descriptor 1K Resolution Format Register ............ B-18
Level Two Descriptor 4K Resolution Format Register ............ B-20
Configuring the MPC801 Memory Controller .................................... B-26
General Configuration ............................................................. B-27
SRAM Configuration ................................................................ B-27
EPROM Configuration ............................................................. B-31
DRAM Configuration ............................................................... B-34
Porting to the PowerQUICC .............................................................. B-43
Using the PowerPC Core .................................................................. B-44
Bit Labeling ........................................................................................ B-44
Code Portability ....................................................................... B-44
Cache ................................................................................................ B-44
Cache Performance Impact ..................................................... B-44
Data Coherency ...................................................................... B-45
Debugging ............................................................................... B-45
Memory Management Unit ................................................................ B-45
Real-Time Operating Systems .......................................................... B-45