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IEEE 1149.1 Test Access Port

MPC801 USER’S MANUAL

19.3.1 The External Test Instruction

The external test (

an internal reset for the MPC801 system logic to force a known beginning internal state while

performing external boundary scan operations. By using the TAP controller, the register is

capable of scanning user-defined values into the output buffers, capturing values presented

to the input pins, and controlling the output drive of three-stateable output or bidirectional

pins. For more details on the function and use of

) instruction selects the 316-bit boundary scan register and asserts

, refer to the IEEE 1149.1 standard.

19.3.2 The sample/preload Instruction

sample/preload

instruction initializes the boundary scan register output cells before

is selected. This initialization ensures that known data will appear on the outputs

when entering the

instruction. The

sample/preload

opportunity to obtain a snapshot of system data and control signals.

instruction also provides an

Since there is no internal synchronization between the TCK and

CLKOUT pins, you must provide some form of external

synchronization between the JTAG operation TCK

frequency and system operation CLKOUT frequency

to achieve meaningful results.

19.3.3 The bypass Instruction

instruction creates a shift register path from the TDI pin to the bypass register

and, finally, to the TDO pin, thus circumventing the 316-bit boundary scan register. This

instruction is used to enhance test efficiency when a component other than the MPC801 is

the device being tested. It selects the single-bit bypass register as illustrated in Figure 19-7.

Figure 19-7. Bypass Register

When the bypass register is selected by the current instruction, the shift register stage is set

to a logic zero on the rising edge of the TCK pin in the capture-DR controller state.

Therefore, the first bit to be shifted out after selecting the bypass register is always a logic

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