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Chapter 5. Enhanced Multiply-Accumulate Unit (EMAC)
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5-5
General Operation
Figure 5-5. Signed and Unsigned Integer Alignment
Thus, the 48-bit accumulator definition is a function of the EMAC operating mode. Given
that each 48-bit accumulator is the concatenation of 16-bit ACCextx contents and 32-bit
ACCx contents, the specific definitions are as follows:
if MACSR[6:5] == 00/* signed integer mode */
Complete Accumulator[47:0] = {ACCextx[15:0], ACCx[31:0]}
if MACSR[6:5] == -1/* signed fractional mode */
Complete Accumulator [47:0] = {ACCextx[15:8], ACCx[31:0], ACCextx[7:0]}
if MACSR[6:5] == 10/* unsigned integer mode */
Complete Accumulator[47:0] = {ACCextx[15:0], ACCx[31:0]}
The four accumulators are represented as an array, ACCx, where x selects the register.
Although the multiplier array is implemented in a four-stage pipeline, all arithmetic MAC
instructions have an effective issue rate of 1 cycle, regardless of input operand size or type.
All arithmetic operations use register-based input operands, and summed values are stored
internally in an accumulator. Thus, an additional move instruction is needed to store data in
a general-purpose register. One feature new to MAC instructions is the ability to choose the
upper or lower word of a register as a 16-bit input operand. This is useful in filtering
operations if one data register is loaded with the input data and another is loaded with the
coefficient. Two 16-bit multiply accumulates can be performed without fetching additional
operands between instructions by alternating the word choice during the calculations.
The EMAC has four accumulator registers versus the MAC’s single accumulator. The
additional registers improve the performance of some algorithms by minimizing pipeline
stalls needed to store an accumulator value back to general-purpose registers. Many
algorithms require multiple calculations on a given data set. By applying different
accumulators to these calculations, it is often possible to store one accumulator without any
stalls while performing operations involving a different destination accumulator.
X
OperandY
OperandX
Product
Extended Product
Accumulator
32
32
32
32
32
8
8
8
24
8
8
+
Extension Byte Upper [7:0]
Extension Byte Lower [7:0]
Accumulator [31:0]
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