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ColdFire CF4e Core User’s Manual
For More Information On This Product,
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CONTENTS
Paragraph
Number
Title
Page
Number
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.4
Vector Base Register (VBR)........................................................................... 2-9
Supervisor/User Stack Pointers (A7 and OTHER_A7).................................. 2-9
Cache Control Register (CACR) .................................................................. 2-10
Access Control Registers (ACR0–ACR3).................................................... 2-10
RAM Base Address Registers (RAMBAR0/RAMBAR1)........................... 2-10
ROM Base Address Registers (ROMBAR0/ROMBAR1)........................... 2-10
Module Base Address Register (MBAR) ..................................................... 2-10
Programming Model Table............................................................................... 2-12
Chapter 3
Instructions
Chapter 4
Floating-Point Unit (FPU)
4.1
4.1.1
4.2
4.2.1
4.2.2
4.2.3
4.2.3.1
4.2.3.2
4.2.3.3
4.2.3.4
4.2.3.5
4.3
4.3.1
4.3.1.1
4.3.2
4.3.3
4.3.4
4.3.4.1
4.3.4.2
4.3.5
4.3.5.1
4.3.5.2
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
FPU Overview .................................................................................................... 4-1
Notational Conventions .................................................................................. 4-2
Operand Data Formats and Types....................................................................... 4-3
Signed-integer Data Formats.......................................................................... 4-3
Floating-Point Data Formats........................................................................... 4-3
Floating-Point Data Types.............................................................................. 4-4
Normalized Numbers.................................................................................. 4-4
Zeros........................................................................................................... 4-4
Infinities...................................................................................................... 4-5
Not-A-Number............................................................................................ 4-5
Denormalized Numbers.............................................................................. 4-5
FPU Programmer’s Model.................................................................................. 4-7
Floating-Point Data Registers (FP0–FP7) ...................................................... 4-8
Floating-Point Control Register (FPCR).................................................... 4-8
Floating-Point Status Register (FPSR)........................................................... 4-9
Floating-Point Instruction Address Register (FPIAR).................................. 4-11
Floating-Point Computational Accuracy...................................................... 4-11
Intermediate Result................................................................................... 4-11
Rounding the Result ................................................................................. 4-12
Floating-Point Post Processing..................................................................... 4-15
Underflow, Round, Overflow................................................................... 4-16
Conditional Testing .................................................................................. 4-16
Floating-Point Exceptions............................................................................. 4-19
Floating-Point Arithmetic Exceptions.......................................................... 4-20
Branch/Set on Unordered (BSUN)............................................................... 4-21
Input Not-A-Number (INAN)....................................................................... 4-22
Input Denormalized Number (IDE).............................................................. 4-22
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