
About This Book
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About This Book
The primary objective of this user’s manual is to define the functionality of CF4e ColdFire
microprocessor core. The CF4e implementation of the Version 4 (V4) core includes the
floating-point unit (FPU), enhanced multiply-accumulate unit (EMAC), and memory
management unit (MMU) that are defined as optional in the V4 architecture.
The information in this book is subject to change without notice, as described in the
disclaimers on the title page of this book. As with any technical documentation, it is the
readers’ responsibility to be sure they are using the most recent version of the
documentation.
To locate any published errata or updates for this document, refer to the world-wide web at
http://www.motorola.com/coldfire.
Audience
This manual is intended for developers who want to use the CF4e processor core in their
products. It is assumed that the reader understands operating systems, microprocessor
system design, general principles of software and hardware, and basic details of the
ColdFire architecture.
Organization
Following is a summary and a brief description of the major sections of this manual:
Chapter 1, “Introduction,” includes general descriptions of the CF4e
implementation of the V4 architecture, focussing in particular on new features.
Chapter 2, “Registers,” describes the organization of CFe general-purpose and
control registers in the user and supervisor programming models.
Chapter 3, “Instructions,” provides a pointer to the instruction descriptions in the
ColdFire Family Programmer’s Reference Manual (PRM)
Chapter 4, “Floating-Point Unit (FPU),” describes instructions implemented in the
floating-point unit (FPU) designed for use with the ColdFire family of
microprocessors. The FPU conforms to the American National Standards Institute
(ANSI)/Institute of Electrical and Electronics Engineers (IEEE)
Floating-Point Arithmetic
(ANSI/IEEE Standard 754).
.
Standard for Binary
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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