Chapter 1. Introduction
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1-9
Data Format Summary
1.7 Data Format Summary
Table 1-2 lists the operand data formats. Integer operands can reside in registers, memory,
or instructions. The operand size is either explicitly encoded in the instruction or implicitly
defined by the instruction operation.
1.7.1 Data Organization in Registers
The following sections describe data organization in data, address, and control registers.
Section 4.2.2, “Floating-Point Data Formats,” describes floating-point formatting.
1.7.1.1 Integer Data Format Organization in Registers
Figure 1-4 shows the integer format for data registers. Each integer data register is 32 bits
wide. Byte and word operands occupy the lower 8- and 16-bit portions of integer data
registers, respectively. Longword operands occupy the entire 32 bits of integer data
registers. A data register that is either a source or destination operand only uses or changes
the appropriate lower 8 or 16 bits in byte or word operations, respectively. The remaining
high-order portion does not change. Note that the least-significant bit is bit 0 for all data
types, whereas the msbs for longword integer is bit 31, the msb of a word integer is bit 15,
and the msb of a byte integer is bit 7.
PCR1L1
0xD0B
Yes
32 lsbs of RAM 1 permutation control register 1
PCR2U1
0xD0C
Yes
32 msbs of RAM 1 permutation control register 2
PCR2L1
0xD0D
Yes
32 lsbs of RAM 1 permutation control register 2
PCR3U1
0xD0E
Yes
32 msbs of RAM 1 permutation control register 3
PCR3L1
0xD0F
Yes
32 lsbs of RAM 1 permutation control register 3
1
Field definitions for these optional registers are implementation-specific
Table 1-2. Integer Data Formats
Operand Data Format
Size
Bit
1 bit
Byte integer
8 bits
Word integer
16 bits
Longword integer
32 bits
Table 1-1. ColdFire CPU Space Assignments
Name
CPU Space
Assignment
Written with MOVEC
Register Name
F
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