1-14
ColdFire CF4e Core User’s Manual
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Instruction Set Overview
New instructions:
— INTOUCH loads blocks of instructions to be locked in the instruction cache.
— MOV3Q.L moves 3-bit immediate data to the destination location.
— MOVE to/from USP loads and stores user stack pointer.
— MVS.{B,W} sign-extends the source operand and moves it to the destination
register.
— MVZ.{B,W} zero-fills the source operand and moves it to the destination
register.
— SATS.L performs a saturation operation for signed arithmetic and updates the
destination register depending on CCR[V] and bit 31 of the register.
— TAS.B performs an indivisible read-modify-write cycle to test and set the
addressed memory byte.
Enhancements to existing Revision_A instructions:
— Longword support for branch instructions (Bcc, BRA, BSR)
— Byte and word support for compare instructions (CMP, CMPI)
— Word support for the compare address register instruction (CMPA)
— Byte and longword support for MOVE.x,where the source is immediate data and
the destination is specified by d16(Ax); that is, MOVE.{B,W} #<data>, d16(Ax)
Floating-point instructions. See Chapter 4, “Floating-Point Unit (FPU).”
EMAC instructions. See Chapter 5, “Enhanced Multiply-Accumulate Unit
(EMAC).”
Table 1-4 shows the syntax for the new and enhanced instructions. As Table 1-4 shows,
some ISA_B opcodes were defined in the M68K family and others are new
.
Table 1-4. V4 New Instruction Summary
Instruction
Mnemonic
1
Source
Destination
68K
ISA_B Extensions
Branch Always
bra.l
<label>
Yes
Branch Conditionally
bcc.l
<label>
Yes
Branch to Subroutine
bsr.l
<label>
Yes
Compare
cmp.{b,w,l}
<ea>y
Dx
Yes
Compare Address
cmpa.w
<ea>y
Ax
Yes
Compare Immediate
cmpi.{b,w}
#<data>
Dx
Yes
Instruction Fetch Touch
intouch
<Ay>
Move 3-Bit Data Quick
mov3q.l
#<data>
<ea>x
Move Data Source to Destination
move.{b,w}
#<data>
d16(Ax)
Yes
Move from USP
move.l
USP
Ax
Yes
Move to USP
move.l
Ay
USP
Yes
F
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