Chapter 6. Instruction Pipeline and Timing
For More Information On This Product,
Go to: www.freescale.com
6-25
Instruction Execution Times
6.5.3 Execution Timings—Two-Operand Instructions
Table 6-11 shows standard timings for double operand instructions.
Table 6-10. One-Operand Instruction Execution Times
Opcode
<ea>
Effective Address
Rn
(An)
(An)+
-(An)
(d16,An)
(d8,An,Xi*SF)
(xxx).wl
#xxx
clr.b
<ea>
1(0/0)
1(0/1)
1(0/1)
1(0/1)
1(0/1)
2(0/1)
1(0/1)
—
clr.w
<ea>
1(0/0)
1(0/1)
1(0/1)
1(0/1)
1(0/1)
2(0/1)
1(0/1)
clr.l
<ea>
1(0/0)
1(0/1)
1(0/1)
1(0/1)
1(0/1)
2(0/1)
1(0/1)
—
ext.w
Dx
1(0/0)
—
—
—
—
—
—
—
ext.l
Dx
1(0/0)
—
—
—
—
—
—
—
extb.l
Dx
1(0/0)
—
—
—
—
—
—
—
neg.l
Dx
1(0/0)
—
—
—
—
—
—
—
negx.l
Dx
1(0/0)
—
—
—
—
—
—
—
not.l
Dx
1(0/0)
—
—
—
—
—
—
—
sats.l
Dx
1(0/0)
—
—
—
—
—
—
—
scc
Dx
1(0/0)
—
—
—
—
—
—
—
swap
Dx
1(0/0)
—
—
—
—
—
—
—
tas
<ea>
1(1/1)
1(1/1)
1(1/1)
1(1/1)
1(1/1)
2(1/1)
1(1/1)
—
tst.b
<ea>
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
tst.w
<ea>
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
tst.l
<ea>
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
Table 6-11. Two-Operand Instruction Execution Times
Opcode
<ea>
Effective Address
Rn
(An)
(An)+
-(An)
(d16,An)
(d8,An,Xi*SF)
(xxx).wl
#<xxx>
add.l
<ea>,Rx
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
add.l
Dy,<ea>
—
1(1/1)
1(1/1)
1(1/1)
1(1/1)
2(1/1)
1(1/1)
—
addi.l
#imm,Dx
1(0/0)
—
—
—
—
—
—
—
addq.l
#imm,<ea>
1(0/0)
1(1/1)
1(1/1)
1(1/1)
1(1/1)
2(1/1)
1(1/1)
—
addx.l
Dy,Dx
1(0/0)
—
—
—
—
—
—
—
and.l
<ea>,Rx
1(0/0)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
2(1/0)
1(1/0)
1(0/0)
and.l
Dy,<ea>
—
1(1/1)
1(1/1)
1(1/1)
1(1/1)
2(1/1)
1(1/1)
—
andi.l
#imm,Dx
1(0/0)
—
—
—
—
—
—
—
asl.l
<ea>,Dx
1(0/0)
—
—
—
—
—
—
1(0/0)
asr.l
<ea>,Dx
1(0/0)
—
—
—
—
—
—
1(0/0)
bchg
Dy,<ea>
2(0/0)
2(1/1)
2(1/1)
2(1/1)
2(1/1)
3(1/1)
2(1/1)
—
F
Freescale Semiconductor, Inc.
n
.