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ColdFire CF4e Core User’s Manual
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Instructions
The examples in Table 4-27, Table 4-28, and Table 4-29 show a 68K operation and the
equivalent ColdFire sequence.
If the subroutine includes LINK and UNLK instructions, the stack space needed for FPU
register storage can be factored into these operations and LEA instructions are not
required.
The 68K FPU supports loads and stores of multiple control registers (FPCR, FPSR, and
FPIAR) with one instruction. For ColdFire, only one can be moved at a time.
For instructions that require an unsupported addressing mode, the operand address can be
formed with a LEA instruction immediately before the FPU operation. See Table 4-28.
The 68K FPU allows floating-point instructions to directly specify immediate values; the
ColdFire FPU does not support these types of immediate constants. It is recommended
that floating-point immediate values be moved into a table of constants that can be
referenced using PC-relative addressing or as an offset from another address pointer. See
Table 4-29.
Table 4-27. 68K/ColdFire Operation Sequence 1
1
1
n is the number of FP registers to be saved/restored.
68K
ColdFire Equivalent
fmovem.x #list,-(a7)
lea -8*n(a7),a7;allocate stack space
fmovem.d #list,(a7) ;save FPU registers
fmovem.x (a7)+,#list
fmovem.d (a7),#list ;restore FPU registers
lea 8*n(a7),a7 ;deallocate stack space
Table 4-28. 68K/ColdFire Operation Sequence 2
68K
ColdFire Equivalent
fadd.s label,fp2
lea label,a0;form pointer to data
fadd.s (a0),fp2
fmul.d (d8,a1,d7),fp5
lea (d8,a1,d7),a0;form pointer to data
fmul.d (a0),fp5
fcmp.l (d8,pc,d2),fp3
lea (d8,pc,d2),a0;form pointer to data
fcmp.l (a0),fp3
Table 4-29. 68K/ColdFire Operation Sequence 3
68K
ColdFire Equivalent
fadd.l #imm1,fp3
fadd.l (imm1_label,pc),fp3
fsub.s #imm2,fp4
fsub.s (imm2_label,pc),fp3
F
Freescale Semiconductor, Inc.
n
.