
Agere Systems Inc.
15
Data Sheet
May 2001
and Packet Payload Engine
Ambassador T8110 PCI-Based H.100/H.110 Switch
2 Pin Description
(continued)
Table 9. T8110 Pinouts
(continued)
L-Bus Interface
Ball
J20
J19
J18
K17
K20
K19
K18
L18
L20
L19
M18
M17
M20
M19
N19
N18
N20
P20
P19
P18
R20
R19
R18
P17
T20
T19
T18
U20
V20
U19
U18
T17
H20
H19
H18
G19
Y20
Y19
W20
W19
W18
V19
V18
V17
Pin Name
LD0
LD1
LD2
LD3
LD4
LD5
LD6
LD7
LD8
LD9
LD10
LD11
LD12
LD13
LD14
LD15
LD16
LD17
LD18
LD19
LD20
LD21
LD22
LD23
LD24
LD25
LD26
LD27
LD28
LD29
LD30
LD31
L_SC0
L_SC1
L_SC2
L_SC3
FG0
FG1
FG2
FG3
FG4
FG5
FG6
FG7
Buffer Type
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA 3-state
8 mA 3-state
8 mA 3-state
8 mA 3-state
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
8 mA I/O-Schmitt
Pull Up/Down
(see note on page 11)
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
—
—
—
—
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up
LPUE: 50 k
up