
212
Agere Systems Inc.
Data Sheet
May 2001
and Packet Payload Engine
Ambassador T8110 PCI-Based H.100/H.110 Switch
Appendix B. Register Bit Field Mnemonic Summary
(continued)
LDRSN
LERSN
LFRSN
LGRSN
LHRSN
F0LLR
F0ULR
F0ISB
F0WSP
F0RSR
F1LLR
F1ULR
F1ISB
F1WSP
F1RSR
F2LLR
F2ULR
F2ISB
F2WSP
F2RSR
F3LLR
F3ULR
F3ISB
F3WSP
F3RSR
F4LLR
F4ULR
F4ISB
F4WSP
F4RSR
F5LLR
F5ULR
F5ISB
F5WSP
F5RSR
F6LLR
F6ULR
F6ISB
F6WSP
F6RSR
F7LLR
Local group D rate
Local group E rate
Local group F rate
Local group G rate
Local group H rate
Frame 0 lower start time
Frame 0 upper start time
Frame 0 pulse inversion
Frame 0 pulse width
Frame 0 pulse width rate
Frame 1 lower start time
Frame 1 upper start time
Frame 1 pulse inversion
Frame 1 pulse width
Frame 1 pulse width rate
Frame 2 lower start time
Frame 2 upper start time
Frame 2 pulse inversion
Frame 2 pulse width
Frame 2 pulse width rate
Frame 3 lower start time
Frame 3 upper start time
Frame 3 pulse inversion
Frame 3 pulse width
Frame 3 pulse width rate
Frame 4 lower start time
Frame 4 upper start time
Frame 4 pulse inversion
Frame 4 pulse width
Frame 4 pulse width rate
Frame 5 lower start time
Frame 5 upper start time
Frame 5 pulse inversion
Frame 5 pulse width
Frame 5 pulse width rate
Frame 6 lower start time
Frame 6 upper start time
Frame 6 pulse inversion
Frame 6 pulse width
Frame 6 pulse width rate
Frame 7 lower start time
Select
Select
Select
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
Load
Enable
Select
Select
Load
0x00321
0x00322
0x00322
0x00323
0x00323
0x00400
0x00401
0x00402
0x00402
0x00403
0x00410
0x00411
0x00412
0x00412
0x00413
0x00420
0x00421
0x00422
0x00422
0x00423
0x00430
0x00431
0x00432
0x00432
0x00433
0x00440
0x00441
0x00442
0x00442
0x00443
0x00450
0x00451
0x00452
0x00452
0x00453
0x00460
0x00461
0x00462
0x00462
0x00463
0x00470
U
L
U
L
U
—
—
7
6:0
—
—
—
7
6:0
—
—
—
7
6:0
—
—
—
7
6:0
—
—
—
7
6:0
—
—
—
7
6:0
—
—
—
7
6:0
—
—
Table 134. Mnemonic Summary, Sorted by Register
(continued)
Mnemonic
Description
Type
Register
Bit Position