204
Agere Systems Inc.
Data Sheet
May 2001
and Packet Payload Engine
Ambassador T8110 PCI-Based H.100/H.110 Switch
Appendix B. Register Bit Field Mnemonic Summary
(continued)
NR2DR
OLHLR
OLLLR
OOLER
OOLOB
P1ISR
P1RSR
P2RSR
PAFSR
PDTSB
PMBEB
PMEOB
PMFOB
PMIOB
PMLOB
PMOOB
PMWOB
PRBEB
R0HLR
R0SLR
R0WLR
R1HLR
R1SLR
R1WLR
R2HLR
R2SLR
R2WLR
R3HLR
R3SLR
R3WLR
R4HLR
R4SLR
R4WLR
R5HLR
R5SLR
R5WLR
R6HLR
R6SLR
R6WLR
R7HLR
R7SLR
NETREF2
Out-of-lock threshold, high
Out-of-lock threshold, low
Out-of-lock monitor
Out-of-lock status
APLL1 input
APLL1 rate
APLL2 rate
Phase align frame
Diag PCI discard timer
PCI reset to minibridge
PCI master stall error
PCI master fatal error
PCI master initial warning
PCI master lock error
PCI master overwrite
PCI master stall warning
PCI reset of back end
MB_CS0 read cycle hold
MB_CS0 read cycle setup
MB_CS0 read cycle width
MB_CS1 read cycle hold
MB_CS1 read cycle setup
MB_CS1 read cycle width
MB_CS2 read cycle hold
MB_CS2 read cycle setup
MB_CS2 read cycle width
MB_CS3 read cycle hold
MB_CS3 read cycle setup
MB_CS3 read cycle width
MB_CS4 read cycle hold
MB_CS4 read cycle setup
MB_CS4 read cycle width
MB_CS5 read cycle hold
MB_CS5 read cycle setup
MB_CS5 read cycle width
MB_CS6 read cycle hold
MB_CS6 read cycle setup
MB_CS6 read cycle width
MB_CS7 read cycle hold
MB_CS7 read cycle setup
Divide
Load
Load
Enable
Output
Select
Select
Select
Enable
Select
Enable
Output
Output
Output
Output
Output
Output
Enable
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
Load
0x00215
0x00119
0x00118
0x0011A
0x00125
0x00202
0x00203
0x00207
0x00107
0x00146
0x00101
0x00126
0x00126
0x00126
0x00126
0x00126
0x00126
0x00101
0x00702
0x00700
0x00701
0x00712
0x00710
0x00711
0x00722
0x00720
0x00721
0x00732
0x00730
0x00731
0x00742
0x00740
0x00741
0x00752
0x00750
0x00751
0x00762
0x00760
0x00761
0x00772
0x00770
—
—
—
—
6
—
—
—
—
5
3
5
7
2
6
3
4
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Table 133. Mnemonic Summary, Sorted by Name
(continued)
Mnemonic
Description
Type
Register
Bit Position