TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
130
Agere Systems Inc.
8 TMUX Registers
(continued)
Table 153. TMUX Register Map
(continued)
Note:
The reset default of all reserved bits is 0. Shading denotes reserved bits.
Addr
Symbol
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Transmit High-Speed Error Insertion Control Parameters
—
R/W
0x40048
page 114
TMUX_
TBERINS_CTL
TMUX_TP
SLREIINS
TMUX_TP
SB2EINS
TMUX_TPREIINS[3:1]
TMUX_THSB3ERRINS[3:1]
TMUX_
TLREIINS
TMUX_THSB2ERRINS[3:1]
TMUX_THS
B1ERRINS
0x40049
page 115
TMUX_THS_ERR_
CTL
TMUX_TAP
SBABINS
TMUX_TH1H2INVEN[3:1]
TMUX_
TH1H2INV
ORNDF
TMUX_TA2ERRINS[4:0]
Receive/Transmit TOAC/POAC Control Parameters
—
R/W
0x4004A
page 115
TMUX_TOAC_CTL
TMUX_
RTOAC_
D412MODE
TMUX_
RTOAC_
D13MODE
TMUX_
RTOAC_
OEPINS
TMUX_
TTOAC_
D412MODE
TMUX_
TTOAC_
D13MODE
TMUX_
TTOAC_
AVAIL
TMUX_
TTOAC_S1
TMUX_
TTOAC_F1
TMUX_
TTOAC_E2
TMUX_
TTOAC_E1
TMUX_
TTOAC_
D4TO12
TMUX_
TTOAC_
D1TO3
TMUX_
TTOAC_
OEPMON
0x4004B
page 117
TMUX_RPOAC_
CTL
TMUX_RPOAC_SEL[1:0]
TMUX_
RPOAC_
OEPINS
TMUX_TPOAC_SEL[1:0]
TMUX_
TPOAC_N1
TMUX_
TPOAC_K3
TMUX_
TPOAC_F
3
TMUX_
TPOAC_F
2
TMUX_
TPOAC_C2
TMUX_
TPOAC_J1
TMUX_
TPOAC_
OEPMON
Transmit High-Speed Offset Control Parameters
—
R/W
0x4004D
page 118
TMUX_
TFRAMEOFFSET
TMUX_TLBITCNT[2:0]
TMUX_TLSTSCNT[1:0]
TMUX_TLCOLCNT[6:0]
TMUX_TLROWCNT[3:0]
B1/B2 Signal Degrade Set/Clear Control Registers
—
R/W
0x4004E
page 118
TMUX_SD_CTL1
TMUX_SDNSSET[18:3]
0x4004F
page 118
TMUX_SD_CTL2
TMUX_SDMSET[7:0]
TMUX_SDLSET[3:0]
TMUX_SDNSSET[2:0]
0x40050
page 118
TMUX_SD_CTL3
TMUX_SDBSET[15:0]
0x40051
page 118
TMUX_SD_CTL4
TMUX_SDNSCLEAR[18:3]
0x40052
page 118
TMUX_SD_CTL5
TMUX_SDMCLEAR[7:0]
TMUX_SDLCLEAR[3:0]
TMUX_SDNSCLEAR[2:0]
0x40053
page 119
TMUX_SD_CTL6
TMUX_SDBCLEAR[15:0]
B1/B2 Signal Fail Set/Clear Control Registers
—
R/W
0x40054
page 119
TMUX_SF_CTL1
TMUX_SFNSSET[18:3]
0x40055
page 119
TMUX_SF_CTL2
TMUX_SFMSET[7:0]
TMUX_SFLSET[3:0]
TMUX_SFNSSET[2:0]
0x40056
page 119
TMUX_SF_CTL3
TMUX_SFBSET[15:0]
0x40057
page 119
TMUX_SF_CTL4
TMUX_SFNSCLEAR[18:3]
0x40058
page 119
TMUX_SF_CTL5
TMUX_SFMCLEAR[7:0]
TMUX_SFLCLEAR[3:0]
TMUX_SFNSCLEAR[2:0]
0x40059
page 119
TMUX_SF_CTL6
TMUX_SFBCLEAR[15:0]