Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
325
Agere Systems Inc.
12 28-Channel Framer Registers
(continued)
Table 459. Framer Register Map
(continued)
Address
Symbol
Bit 15
Bit 14
Bit 13
Bit 12
Arbiter Link Registers—R/W;
See
Table 429
for values of L and T in the register address field.
FRM_LNK_
REFRAME
ICKEDGE
FRM_OPT[1:0]
FRM_FBE_
MODE
FRM_TP_
DD_SRC
Frame Formatter Link Registers—R/W;
See
Table 429
for values of L and T in the register address field.
FRM_
ESFRAMD
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x8LPF0
page 300
0x8LPF1
page 301
0x8LPF2
page 304
FRM_ARLR1
FRM_
LNK_ENA
FRM_ESF_
CRC_EN
FRM_TP_CK
_SRC_EN
FRM_LNK_
TRANSP
FRM_FAST
FRM_LNK_
RESTARTN
FRM_
FRM_ARLR2
FRM_LF_CRT[2:0]
FRM_
AUTO_AIS
FRM_RAIL3_DEC[1:0]
FRM_MODE[3:0]
FRM_ARLR3
FRM_TP_
CK_SRC
FRM_
SYSFSM
0x8LPF4
page 305
0x8LPF5
page 306
FRM_FFLR1
FRM_ZCSMD[2:0]
FRM_
OCKEDGE
FRM_
AUTOPLB
FRM_
AUTOLLB
FRM_
TXRAI
FRM_
AUTOEBIT
FRM_
AUTORAI
FRM_
TXAIS
FRM_FFLR2
FRM_TXLBMD[1:0]
FRM_
TXLLBOFF
FRM_
TXLLBON
FRM_TXIID
FRM_
TXAUXP
Line Decoder/Encoder Link Registers—R/W;
see
Table 439
and
Table 441
for values of L and T in the register address field.
0x8LTFC
page 308
0x8LRFD
page 308
FRM_LDLR1
FRM_
EXCZERO
FRM_RLCLK_
EDGE
FRM_TLCLK_
EDGE
FRM_LD_MODE[2:0]
FRM_LDLR2
FRM_LE_MODE[2:0]
HDLC Channel Registers—R/W;
See
Table 444
for mapping of H and P in the register address field.
Transmit HDLC Channel Registers
FRM_TTIMESLOT[4:0]
0x8HP80
page 309
0x8HP81
page 309
0x8HP82
page 310
0x8HP83
page 311
0x8HP84
page 311
0x8HP85
page 309
0x8HP86
page 312
FRM_HCR1
FRM_TBIT_IM[7:0]
FRM_HCR2
FRM_TFRAME_SEL[1:0]
FRM_TLINK[4:0]
FRM_HCR3
FRM_THC_
RESET
0
FRM_
TENABL
FRM_CFLAGS[1:0]
FRM_
PRMEN
FRM_
TLOOP
FRM_C_R
FRM_
HTTHRSEL
FRM_IFCS
FRM_
HTIDLE
FRM_
HTMODE
FRM_
HTUND
FRM_
MHTUND
FRM_HXPIDLE[1:0]
FRM_HCR4 (RO)
0
0
0
0
0
0
0
0
0
0
0
0
FRM_
HTDONE
FRM_
MHTDONE
FRM_
HTTHRSH
FRM_
MHTTHRSH
FRM_HCR5
FRM_HCR6(WO)
FRM_HTFUNC[1:0]
FRM_HTDATA[7:0]
FRM_HCR7
FRM_HTCOUNT[9:0]
Receive HDLC Channel Registers
FRM_RTIMESLOT[4:0]
0x8HP00
page 312
0x8HP01
page 312
0x8HP02
page 313
0x8HP03
page 314
0x8HP04
page 314
0x8HP05
page 315
FRM_HCR8
FRM_RBIT_IM[7:0]
FRM_HCR9
FRM_RFRAME_SEL[1:0]
FRM_RLINK[4:0]
FRM_HCR10
FRM_RHC_
RESET
0
FRM_
RENABL
0
FRM_
RTHRSEL
0
FRM_RFCS
FRM_
HRMODE
0
FRM_
BYTAL
0
FRM_MATCH[7:0]
FRM_HCR11 (RO)
0
0
0
0
0
0
0
FRM_
RIDLE
FRM_
MIDLE
FRM_
OVR
FRM_
MOVR
FRM_EOP
FRM_
HRTHRSH
FRM_
MHRTHRSH
FRM_HCR12
FRM_
MEOP
FRM_HCR13 (RO)
0
0
0
0
0
FRM_HMDA
FRM_
HRVALID
FRM_
HRTYPE
FRM_HR_DATA[7:0]
FRM_HABRT
FRM_HOVR FRM_HEOP
FRM_
HCRCERR
FRM_HRCOUNT[9:0]
FRM_HIDL
FRM_HBIT[2:0]
0x8HP06
page 315
FRM_HCR14
(COR)