5
Agere Systems Inc.
Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Features ...................................................................................................................................................................1
Product Description ...............................................................................................................................................6
Preface .....................................................................................................................................................................6
Interface Specifications .......................................................................................................................................10
Pin Information .......................................................................................................................................................10
Electrical Characteristics ........................................................................................................................................35
Timing Characteristics ............................................................................................................................................39
Ordering Information ...............................................................................................................................................63
Register Description ............................................................................................................................................64
Microprocessor Interface and Global Control and Status Registers .......................................................................64
TMUX Registers .....................................................................................................................................................77
SPE Mapper Registers .........................................................................................................................................135
VT/TU Mapper Registers ......................................................................................................................................157
M13/M23 MUX/DeMUX Registers ........................................................................................................................200
28-Channel Framer Registers ..............................................................................................................................242
Cross Connect (XC) Registers .............................................................................................................................326
Digital Jitter Attenuation Controller Registers .......................................................................................................336
Test-Pattern Generation/Detection Registers .......................................................................................................342
Functional Descriptions .....................................................................................................................................360
Microprocessor Interface Functional Description .................................................................................................360
TMUX Functional Description ...............................................................................................................................365
SPE Mapper Functional Description .....................................................................................................................402
VT/TU Mapper Functional Description .................................................................................................................431
M13/M23 MUX/DeMUX Block Functional Description ..........................................................................................462
28-Channel Framer Block Functional Description ................................................................................................482
Cross Connect (XC) Block Functional Description ...............................................................................................549
Digital Jitter Attenuation Controller Functional Description ..................................................................................577
Test-Pattern Generation/Detection Functional Description ..................................................................................581
Philosophies .........................................................................................................................................................589
Applications ........................................................................................................................................................594
Application Scripts ................................................................................................................................................620
Superframer ..........................................................................................................................................................782
Change History ...................................................................................................................................................783