Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
403
Agere Systems Inc.
18 SPE Mapper Functional Description
(continued)
Table of Contents
(continued)
Figures
Page
Figure 31. SPE Mapper Block with Connections to External Pins and Other Blocks in the Device ......................405
Figure 32. Basic Functional Flow of the SPE Mapper Transmit Section...............................................................404
Figure 33. Basic Functional Flow of the SPE Mapper Receive Section................................................................407
Figure 34. STS-1 NSMI Receive Operation ..........................................................................................................411
Figure 35. STS-1 NSMI Transmit Operation .........................................................................................................412
Figure 36. Receive Direction Path Termination Block...........................................................................................413
Figure 37. Pointer Interpretation State Diagram....................................................................................................414
Figure 38. Transmit Direction Path Insertion Block...............................................................................................426
Tables
Page
Table 548. J1 Monitor............................................................................................................................................418
Table 549. STS Signal Label Defect Conditions....................................................................................................418
Table 550. C2MON Processing .............................................................................................................................419
Table 551. F2 Monitor............................................................................................................................................420
Table 552. F3 Monitor............................................................................................................................................420
Table 553. N1 Monitor ...........................................................................................................................................420
Table 554. K3 Monitor............................................................................................................................................421
Table 555. AIS-P and RDI-P Detect ......................................................................................................................421
Table 556. STS-1 P-REI Interpretation..................................................................................................................422
Table 557. Signal Degrade Parameters.................................................................................................................423
Table 558. Signal Fail Parameters.........................................................................................................................424
Table 559. Path Overhead Byte Access................................................................................................................425
Table 560. RDI-P Defects for Enhanced RDI-P Mode...........................................................................................428
Table 561. Path Overhead Byte Access—Transmit Direction ...............................................................................429
Table 562. TPOAC Control Bits ............................................................................................................................430