
Agere Systems Inc.
153
Data Sheet
July 2001
T8302 Internet Protocol Telephone
Advanced RISC Machine (
ARM
)
12 Ethernet 10/100 PHY(s)
(continued)
12.5.10 MR7 Next Page Transmit Register Bit Description
12.5.11 MR16 PCS Control Register Bit Description
Table 136. MR16 PCS Control Register Bit Description
Table 135. MR7 Next Page Transmit Register Bit Description
Bit #
15
Name
Type
R/W
Description
NEXT_PAGE
Next page.
This bit indicates whether or not this is the last next page to be trans-
mitted.
If 0, it indicates that this is the last page.
If 1, it indicates there is an additional next page.
Acknowledge.
This bit is the acknowledge bit from the link code word.
Message page.
This bit is used to differentiate a message page from an unfor-
matted page.
14
13
ACK
R
MESSAGE
R/W
If 0, it indicates an unformatted page.
If 1, it indicates a formatted page.
Acknowledge 2.
This bit is used by the next page function to indicate that a
device has the ability to comply with the message. It is set as follows:
12
ACK2
R/W
If 0, it indicates the device cannot comply with the message.
If 1, it indicates the device will comply with the message.
Toggle. This bit is used by the arbitration function to ensure synchronization with
the link partner during next page exchange. This bit will always take the opposite
value of the toggle bit in the previously exchanged link code word.
11
TOGGLE
R
If the bit is a logic 0, the previous value of the transmitted link code word was a
logic 1.
If the bit is a 1, the previous value of the transmitted link code word was
a 0. The initial value of the toggle bit in the first next page transmitted is the
inverse of the value of bit 11 in the base link code word, it assumes a value of
1 or 0.
Message/unformatted code field. (2048 possible messages with
these 11 bits.)
10:0
MCF
R/W
Bit #
15
14:12
11:4
Name
LOCKED
RSVD
TESTBITS
Type
R
R
R/W
Description
Locked.
Locked pin from descrambler block.
Reserved.
Will always be read back as 0.
Generic test bits.
These bits are for manufacturing test only. A 0
should be written to these bits.
Loopback configure.
3
LOOPBACK
R/W
If high, the entire loopback is performed in the PCS macro.
If low, only the collision pin is disabled in loopback.
Scan test mode.
Force loopback. Force a loopback without forcing idle on the trans-
mit side or disabling the collision pin.
Speed-up counters.
Reduce link monitor counter to 10 ms from
620
μ
s. (Same as
FASTTEST
= 1.)
2
1
SCAN
R/W
R/W
FORCE LOOPBACK
0
SPEEDUP COUNTERS
R/W