
224
Agere Systems Inc.
T8302 Internet Protocol Telephone
Advanced RISC Machine (
ARM
)
Data Sheet
July 2001
17 Key and Lamp Controller (KLC)
(continued)
17.1 KLC Operation
A schematic of the KLC interface matrix is shown in
Figure 30
. The KLC uses a time-division multiplexed scheme
for sampling the keyboard matrix and driving the LED matrix. The keyboard matrix is sampled once every 12.5 ms
and the LED matrix is driven between key samples. The values stored in the
lamp rate registers
determine the
flash patterns for all LED's in the matrix. The
key scan status register
contains information about what keys are
pressed and the current state of the switch-hook at the end of the key scan cycle. The
KLC noscan control regis-
ter
contains the reset bit for the KLC and allows control over the amount of time the KLC will wait to sample the key
matrix after detecting a key press or release. Interrupts generated by key-presses,
key releases
, or the switch-hook
will be noted in the
KLC interrupt register
if the specific type of KLC interrupt is enabled in the
KLC interrupt
enable register
.
17.1.1 LED Drive Matrix Operation
The KLC drives the LEDs in its matrix in a time division multiplexed scheme. Each LED row is activated (driven low)
one at a time. While that row is activated, all LEDs in that row that are programmed to be on at that time will be illu-
minated by activating those LED’s columns (driving them high). LEDs that are not programmed to be illuminated
will have their columns deactivated. In order for LEDs to be activated, the
LCNTRL
output must be high. While the
KLC is transitioning between LED rows, the
LCNTRL
signal turns off power to the LED matrix for a short time. This
allows time for the column outputs to change for the new row. Upon completion of the LED drive time for all rows
LCNTRL
will deactivate the LED matrix, and the key matrix will be sampled. Then the LED rows will be driven
again in the same order starting with row 0 and ending with row 6.
The KLC contains 29
LED rate registers
. Each of these registers controls two LEDs. The first 28 registers control
the LEDs in the LED matrix. The twenty-ninth register controls the message and speaker LED direct-drive output
pins. All
LED rate registers
are set to all zeros (LEDs off) during reset. The KLC will generate the rate patterns for
the LED drive from the 32.768 kHz input clock (RTC). Each of the LEDs will be driven by one of these patterns.
This means that every LED, set to the same pattern, will turn on and off at the same time and will remain in syn-
chronization with each other.
The LED drive matrix elements must be designed to handle the current needed by the LED drive matrix. The exter-
nal row PNP transistors must be capable of driving all LEDs in its respective row. At higher currents, the forward
current gain of most transistors must be derated from their typical values. In addition, as these transistors are
driven into saturation, the current gain is also reduced. The KLC row outputs are designed with an 8 mA output
driver to provide adequate
low-level current
output capacity. The
LCNTRL
external NPN transistor must be able to
handle as much current as any row transistor. Its output is designed with an 8 mA output driver that provides at
least 8 mA of high-l
evel
current output capacity that will adequately drive a properly selected transistor into satura-
tion.
Each external column NPN transistor handles at most a single LED’s current at any one time. The column output
pins are designed with 4 mA output buffers. These buffers can provide an output high-
level
current capacity of 4 mA
that is more than sufficient to drive the external matrix transistors.
The message and speaker LED output pins
MSGLED
and
SPKRLED
are designed with an 8 mA output buffer that
will handle either a red or a green LED.
17.1.2 Key Scan Matrix Operation
The KLC scans its key matrix by asserting the row outputs and checking for connections to any column inputs (indi-
cating a pressed key). The KLC turns off all LEDs by driving its master
LCNTRL
output to an inactive state, dis-
abling all LED columns. The KLC then 3-states the column inputs leaving their internal 50 k
pull-down resistor
connected, asserting all row outputs simultaneously. Any key that is depressed will connect its column pin to its row
pin via a low-impedance path and will pull the column pin high. If no keys are pressed, the column inputs remain
low (due to their internal pull-down resistors) and the KLC precedes with its next LED drive cycle.